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參數(shù)資料
| 型號： | HM17CM4096 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM |
| 中文描述： | 128XRGBX162輸出LCD驅(qū)動器內(nèi)置內(nèi)存 |
| 文件頁數(shù)： | 51/67頁 |
| 文件大小： | 1117K |
| 代理商： | HM17CM4096 |
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HM17CM4096
- 51 -
INSTRUCTION TABLE (4)
CODE(80 series I/F)
RE flag
Register address
Control address
INSTRUCTION
CS
RS
RD
WR RE2 RE1 RE0 D7
D6
D5
D4
D3
SC3 SC2 SC1 SC0set
Control of outputs status of CKL
CL
0CKL
1CKL
PWM
mode selection
C256
ON/OFF(default : OFF)
FDC
HSW
access mode
ABS
selection
CKS
WLS
D2
D1
D0
function
Display start command set
0
1
1
0
1
0
0
0
1
1
0
Display signal output set
0
1
1
0
1
0
0
0
1
1
1
*
*
*
SON
FLM
FR
FLM
FLM
CL
CL
FR=”L”(default)
FR=”H”
Display selection control
0
1
1
0
1
0
0
1
0
0
0
PW
M
C25
6
FDC
1
FDC
2
variable 16 /fixed 8 gray
256
color
Mode
boost clock control
RAM data length
0
1
1
0
1
0
0
1
0
0
1
HS
W
ABS CKS WLS
high speed write in at 8 bit
effective
12
bit
RAM
oscillator selection
RAM access length 8 /16 bit
Electric
(lower)
Electric
(upper)
Address set for internal
address reading
Oscillator Rf control
volume
control
0
1
1
0
1
0
0
1
0
1
0
DV3
DV2
volume
control
0
1
1
0
1
0
0
1
0
1
1
*
DV6 DV5 DV4
0
1
1
0
1
0
0
1
1
0
0
Address for register
read
*
RF2 RF1 RF0 RF
Internal register read out
0
1
1
0
1
0
0
1
1
0
1
oscillator Rf selection
Cap.
Of
VLCD
discharge
discharge
0
1
1
0
1
0
0
1
1
1
0
*
*
*
DIS
V1
V4
RE register set
Window end X address set
(lower)
Window end X address set
(upper)
Window end Y address set
(lower)
Window end Y address set
(upper)
Line inversion start address
(lower)
Line inversion start address
(upper)
Line inversion end address
(lower)
Line inversion end address
(upper)
0
1
1
0
0/1
0/1
0/1
1
1
1
1
TST RE2 RE1 RE0 RE flag set
EX3 EX2 EX1 EX0window mode
0
1
1
0
1
0
1
0
0
0
0
end
address
under
0
1
1
0
1
0
1
0
0
0
1
*
EX6 EX5 EX4
0
1
1
0
1
0
1
0
0
1
0
EY3 EY2 EY1 EY0window mode
end
address
under
0
1
1
0
1
0
1
0
0
1
1
EY7 EY6 EY5 EY4
0
1
1
0
1
0
1
0
1
0
0
LS3 LS2 LS1 LS0line inversion mode
0
1
1
0
1
0
1
0
1
0
1
LS7 LS6 LS5 LS4
0
1
1
0
1
0
1
0
1
1
0
LE3 LE2 LE1 LE0line inversion mode
0
1
1
0
1
0
1
0
1
1
1
LE7 LE6 LE5 LE4
Line inversion control
0
1
1
0
1
0
1
1
0
0
0
*
*
BT
LRE
V
BT: blink type set
LREV: line inversion ON/OFF
Upper/lower
palette
Gradation palette setting
selection
0
1
1
0
1
0
1
1
0
0
1
*
*
*
PS
8
gradation
PWM mode control
0
1
1
0
1
0
1
1
0
1
0
PW
MS
TST RE2 RE1 RE0 RE flag set
PW
MA
PW
MB
PW
MC
PWM mode selection
RE register set
0
1
1
0
0/1
0/1
0/1
1
1
1
1
Notice 1) * mark is Don’t Care
Notice 2) The commands that upper/lower register settings are demanded are effective at the point of commands input.
But electric volume is effective after upper and lower register setting.
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