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參數(shù)資料
| 型號： | HIP5061 |
| 廠商： | Intersil Corporation |
| 元件分類： | FPGA |
| 英文描述： | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 第7A，高效電流模式控制PWM穩(wěn)壓器 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 158K |
| 代理商： | HIP5061 |
7-58
HIP5061
Pin Description
TERMINAL
NUMBER
DESIGNATION
DESCRIPTION
1
GND
This is the analog ground terminal of the IC.
2
V
C
The output of the transconductance amplifier appears at this terminal. Input to the internal
voltage to current converter also appears at this node. Transconductance amplifier gain
and loop response are set at this terminal. When the V
DD
terminal voltage is below the
starting voltage, V
DDMIN
, this terminal is held low. When the voltage at this terminal
exceeds V
CMAX
, 7V typical, implying an over-current condition, a typical 10mA current,
I
VCOVER
pulls this terminal towards ground. This current remains “ON” until the voltage on
the V
C
terminal falls by V
CHYS
, typically 1.1V, below the upper threshold, V
CMAX
.When the
voltage on this terminal falls below V
CEN
, typically 1.5V, the IC is disabled.
3
FB
Feedback from the regulator output is applied to this terminal. This terminal is the input to
the transconductance amplifier. The amplifier compares the internal 5.1V reference and
the feedback signal from the regulator output.
4
SOURCE
The terminal, labeled TAB, has a connection to this terminal, but because of the long lead
length and resulting high inductance of this terminal, it should not be used as a means of
bypassing. Therefore, this terminal is labeled “Do Not Use.”
5
DRAIN
Connection to the Drain of the internal power DMOS transistor is made at this terminal.
6
V
G
Gate drive supply voltage is provided at this terminal. A 10
to 150
resistor connected
between this terminal and the V
DD
terminal provides decoupling and the supply voltage
for the gate drivers.
7
V
DD
External supply input to the IC. A nominal 14V shunt regulator is connected between this
terminal and the TAB. A series resistor should be connected to this terminal from the
external voltage source to supply a minimum current of 33mA and a maximum current of
105mA under the worst cast supply voltage. The series resistor is not required if the
supply voltage is 12V,
±
10%.
TAB
SOURCE
This is the internal power DMOS transistor Source terminal. It should be used as the
ground return for the V
DD
bypass capacitor. In addition high frequency bypassing for both
the regulator output load voltage and supply input voltage should be returned to this
terminal.
For more information refer to Application Notes AN9208, AN9212, AN9323.
Foot Print For Soldering
TO-220 STAGGERED GULL WING SIP
LIMIT OF SOLDER MASK
FOR HEADER
0.050 TYP
0.050 TYP
0.080 TYP
OPTIONAL 0.151
0.523
0.480
0.575
0.675
0.120
0.212
0.424
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP5061DS | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062 | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062DW | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062DY | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5063 | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP5061DS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP5061DS WAF | 制造商:Harris Corporation 功能描述: |
| HIP5062 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
| HIP5062DW | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
| HIP5062DY | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
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