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參數(shù)資料
| 型號： | HIP5061 |
| 廠商： | Intersil Corporation |
| 元件分類： | FPGA |
| 英文描述： | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 第7A，高效電流模式控制PWM穩(wěn)壓器 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 158K |
| 代理商： | HIP5061 |
7-68
HIP5061
topology is used, this is not the case. Shutting down the regu-
lator via the V
C
terminal will cut off the output. Figure 36 shows
two methods of shutting down the IC. In each case the current
sinking circuit must be able to sink at least 4mA, the maximum
current from the HIP5061 V
C
terminal.
FIGURE 36. TWO METHODS OF SHUTTING DOWN THE HIP5061
Mounting, Layout and Component
Selection
The TO-220 package with its gullwing leads was designed to
be surface mounted. To aid in the external reduction of lead
length and hence inductance and resistance, the IC leads
were staggered. To keep the inductance and resistance of
the critical drain terminal as low as possible, it is suggested
that the PC trace to the DMOS transistor drain terminal be
made as wide as possible. The adjacent source terminal is
not recommended to be used and therefore allows the metal
to the drain terminal to be widened beyond the normal
widths for these terminals. Figure 37 illustrates these points.
One of the most important aspects to the proper application
of this device is high frequency bypassing. In a Boost con-
verter, for example, there should be a low-inductance inter-
connect from the DMOS transistor drain, through the output
diode and capacitors, and returning to the TAB (source) of
the HIP5061. Inductance in this line results in large transient
voltages on the DMOS transistor drain terminal which can
result in voltages above the maximum DMOS transistor
drain voltage rating.
FIGURE 37. SHOWING WIDER PC BOARD METAL FOR
CRITICAL
HIP5061
GATE DRIVER
AND CONTROL
CIRCUITRY
V
DD
V
G
DRAIN
FB
V
C
GND
SOURCE
4mA
FROM CD4049UB
NOTE: FREQUENCY
COMPENSATION NETWORK
NOT SHOWN
OFF
OFF
ALTERNATE METHOD
HIP5061
GROUND PC METAL
V
DD
PC METAL
V
G
PC METAL
IC SOLDERED TO PC BOARD
WIDER
DRAIN
PC METAL
FOR LOWER
INDUCTANCE
NORMAL
PC METAL
FOR FB
AND V
C
All the capacitors shown with values of 1
μ
F or less are of the
multilayer ceramic type with the X7R dielectric material. This
material has a fairly flat voltage and temperature coefficient
that assures that the capacitance remains comparatively con-
stant at extreme operating temperatures and voltages. The
multilayer construction allows for comparatively large values
with good volumetric efficiency and low inductance. Capaci-
tors around the power input and output circuits should be
returned to the device TAB via a low inductance ground plane.
This TAB is internally connected to the DMOS transistor
source. The schematic diagram of Figure 38 was drawn with
the diagonal leads to show the critical paths for the various
high frequency elements. These short interconnects assure
the lowest inductance around the output power circuit.
Design of a 28V, 1.8A Boost Converter
Figure 38 shows the schematic diagram and a parts list of a
50W supply designed with the HIP5061. Table 3 tabulates
the performance of the power supply.
Inductor Selection
In order to maximize the output power for the given maxi-
mum controllable DMOS transistor current, this converter
has been designed to operate in continuous current mode
(CCM). In this mode, the inductor value will generally be
large, resulting in a lower inductor ripple current and a lower
peak DMOS current. To ensure that the converter operates
in CCM over the usable range of input voltage and output
current, the value of L2 must be greater than the “critical
inductance,” given by
TABLE 3. TYPICAL LABORATORY PERFORMANCE OF
50W, 28V/1.8A REGULATOR
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V to 16V
Line Regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mV/V
Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28.0V
Load Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 64mV/A
Output Ripple, FL . . . . . . . . . . . . . . . . . . . . . . . . . .
(20MHz BW)
600mV P-P
Output Ripple, after Filter, FL. . . . . . . . . . . . . . . . .
(20MHz BW)
80mV P-P
Efficiency: V
I
= 11V, I
L
= 0.18A. . . . . . . . . . . . . . . 90%
V
I
= 11V, I
L
= 1.8A. . . . . . . . . . . . . . . . 89%
V
I
= 16V, I
L
= 0.18A. . . . . . . . . . . . . . . 73%
V
I
= 16V, I
L
= 1.8A. . . . . . . . . . . . . . . . 93%
LCRIT
,
----------------------------------------------------------------------------------------------------------
2
–
+
2PO MIN
,
VO
VD
+
=
------------------------------------------------------------------------------------10
6
–
2 5.6
)
28
(
39
μ
H
0.5
+
)
=
=
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP5061DS | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062 | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062DW | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5062DY | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP5063 | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP5061DS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP5061DS WAF | 制造商:Harris Corporation 功能描述: |
| HIP5062 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
| HIP5062DW | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
| HIP5062DY | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip Dual Switching Power Supply |
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