參數(shù)資料
型號(hào): HIP5061
廠商: Intersil Corporation
元件分類: FPGA
英文描述: FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
中文描述: 第7A,高效電流模式控制PWM穩(wěn)壓器
文件頁(yè)數(shù): 10/20頁(yè)
文件大?。?/td> 158K
代理商: HIP5061
7-62
HIP5061
FIGURE 21. TYPICAL CLOCK FREQUENCY PERCENT CHANGE
vs SUPPLY VOLTAGE V
DD
AT 0
o
C AND +100
o
C
FIGURE 22. TYPICAL DMOS TRANSISTOR DRAIN TO SOURCE
RESISTANCE vs TEMPERATURE
FIGURE 23. TYPICAL DMOS TRANSISTOR DRAIN TO SOURCE
RESISTANCE vs DRAIN CURRENT I
DRAIN
AT
0
o
C AND +100
o
C
FIGURE 24. TYPICAL DMOS TRANSISTOR DRAIN TO SOURCE
LEAKAGE CURRENT vs TEMPERATURE
FIGURE 25. TYPICAL TRANSCONDUCTANCE FROM V
C
PIN TO
DMOS TRANSISTOR DRAIN (PEAK CURRENT)
vs TEMPERATURE
FIGURE 26. TYPICAL VOLTAGE TO CURRENT CONVERTER
REFERENCE VOLTAGE vs TEMPERATURE
Typical Performance Curves
(Continued)
10.8
11.2
11.6
12.0
12.4
12.8
13.2
13.6
14.0
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
V
DD
(V)
P
T
A
= 0
o
C
T
A
= +100
o
C
V
DD
= V
G
= 12V, V
FB
= 5.1V
0
10
20
30
40
50
60
70
80
90 100
0.00
0.05
0.10
0.15
0.20
0.25
0.30
AMBIENT TEMPERATURE (
o
C)
S
)
V
DD
= V
G
= 10.8V, I
DRAIN
= 5A
0
1
2
3
4
5
6
7
0.10
0.12
0.14
0.16
0.18
0.20
0.22
0.24
0.26
0.28
0.30
DMOS TRANSISTOR DRAIN CURRENT (A)
T
A
= 0
o
C
T
A
= +100
o
C
V
DD
= V
G
= 10.8V, V
FB
= 5.1V
S
)
0
10
20
30
40
50
60
70
80
90
100
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
AMBIENT TEMPERATURE (
C)
D
μ
A
V
DD
= 60V
0
10
20
30
40
50
60
70
80
90
100
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
AMBIENT TEMPERATURE (
o
C)
T
V
DD
= V
G
= 12V
0
10
20
30
40
50
60
70
80
90
100
2.74
2.76
2.78
2.80
2.82
2.84
2.86
2.88
2.90
AMBIENT TEMPERATURE (
o
C)
R
V
DD
= V
G
= 12V, I
DRAIN
= 0.25A
相關(guān)PDF資料
PDF描述
HIP5061DS FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
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