參數(shù)資料
型號(hào)： GS4900B
廠商： Gennum Corporation
英文描述： SD Clock and Timing Generator with GENLOCK
中文描述： 統(tǒng)計(jì)時(shí)鐘和定時(shí)發(fā)生器鎖相
文件頁(yè)數(shù)： 58/95頁(yè)
文件大?。?/td> 898K
代理商： GS4900B
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
58 of 95
Figure 3-7: Optional 10FID Output Timing
The phasing of the divide by n frame counter may be reset by an external pulse on
the 10FID input pin, or via register 1Ah of the host interface (see
Section 3.10.3 on
page 66
).
NOTE: If a 10FID input signal is not provided to the device, the 10FID output signal
will be invalid until the user initiates a reset via the host interface. The user should
also reset the 10FID signal via the host if at any time the H input reference signal
is removed and then re-applied.
3.8.2 Audio Frame Synchronizing Pulse (GS4901B only)
As described in
Table 1-3
, the audio frame synchronizing (AFS) pulse identifies the
frame, within an n frame sequence, in which the audio sample rate clock is aligned
with the H Sync of line 1. It is generated for all video formats.
The leading edge of the AFS output pulse is co-timed with the H Sync
corresponding to line 1 of every n
th
frame in the sequence, and therefore identifies
the exact time at which the audio sample rate clock and video PCLK have
synchronous leading edges.
The number of frames in the sequence, n, is determined by the video frame rate
and the audio clock frequency. These are selected using the VID_STD[5:0] and
ASR_SEL[2:0] pins or via the host interface.
By default, the AFS pulse is 1 line long, as shown in
Figure 3-8
. Alternatively, by
setting bit 1 of the Audio_Control register, the AFS output signal may be configured
to go HIGH on the leading edge of the H Sync pulse of line 1 of the first field in the
‘n’ frame sequence, and be reset LOW on the leading edge of the H Sync pulse of
line 1 of the second field in the sequence. The AFS timing in this configuration is
similar to the 10FID optional timing shown in
Figure 3-7
.
10FID Output
Horizontal Sync Output
Total Field
Line 1 every n frames where:
n = 5 @ 29.97 fps, 30 fps
n = 10 @ 59.94 fps, 60 fps
相關(guān)PDF資料
PDF描述
GS4900BCNE3 SD Clock and Timing Generator with GENLOCK
GS4901B SD Clock and Timing Generator with GENLOCK
GS4901BCNE3 SD Clock and Timing Generator with GENLOCK
GS4910B HD/SD/Graphics Clock and Timing Generator with GENLOCK
GS4910BCNE3 HD/SD/Graphics Clock and Timing Generator with GENLOCK
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS4900BCNE3 功能描述:IC RE-TIMER RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
GS4901B 制造商:GENNUM 制造商全稱:GENNUM 功能描述:SD Clock and Timing Generator with GENLOCK
GS4901B_09 制造商:GENNUM 制造商全稱:GENNUM 功能描述:SD Clock and Timing Generator with GENLOCK
GS4901BCNE3 功能描述:IC RE-TIMER RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
GS4910B 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD/SD/Graphics Clock and Timing Generator with GENLOCK
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*