參數(shù)資料
型號： GS4900B
廠商： Gennum Corporation
英文描述： SD Clock and Timing Generator with GENLOCK
中文描述： 統(tǒng)計時鐘和定時發(fā)生器鎖相
文件頁數(shù)： 30/95頁
文件大?。?/td> 898K
代理商： GS4900B
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
30 of 95
2.3 AC Electrical Characteristics
Clock Output Drive Current
–
IO_VDD = 1.8V
current drive = LOW
–
5
–
mA
–
–
IO_VDD = 3.3V
current drive = LOW
–
7
–
mA
–
–
IO_VDD = 1.8V
current drive = HIGH
–
7
–
mA
–
–
IO_VDD = 3.3V
current drive = HIGH
–
10
–
mA
–
Output Voltage LVDS, Common
Mode
V
OCM
–
1.125
1.25
1.375
V
3
Output Voltage LVDS, Differential
V
ODIFF
–
–
350
–
mV
3
LVDS High-impedance Leakage
Current
–
To 1.8V or GND
–
–
1.4
uA
–
NOTES
1. All DC and AC electrical parameters within specification.
2. Assuming that the current being sourced or sinked is less than the Timing Output Drive Current specified.
3. Into a 100
Ω
termination connected between PCLK3 and PCLK3.
Table 2-1: DC Electrical Characteristics (Continued)
V
DD
= 1.8V, T
A
= 0°C to 70°C, unless otherwise specified.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Notes
Table 2-2: AC Electrical Characteristics
V
DD
= 1.8V, T
A
= 0°C to 70°C, unless otherwise specified.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Notes
System
Reference Detection Time
–
from when the
reference input is first
present
–
2
4
frames
–
Digital I/O
PCLK Output Frequency
–
–
3.375
–
54
MHz
–
PCLK Jitter
–
XTAL_VDD = 3.3V
–
300
–
ps
1, 2
PCLK Duty Cycle
–
–
40
–
60
%
–
PCLK1 & PCLK2 Rise/Fall Times
15pF load
20% - 80%
–
IO_VDD = 1.8V
current drive = LOW
–
–
1.7
ns
–
–
IO_VDD = 3.3V
current drive = LOW
–
–
1.5
ns
–
–
IO_VDD = 1.8V
current drive = HIGH
–
–
1.1
ns
–
–
IO_VDD = 3.3V
current drive = HIGH
–
–
0.9
ns
–
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