參數(shù)資料
型號： GL9711
廠商： Genesys Logic, Inc.
英文描述： PCI ExpressTM PIPE x1 PHY
中文描述： 的PCI ExpressTM管x1物理層
文件頁數(shù)： 7/42頁
文件大小： 423K
代理商： GL9711
GL9711 PCI Express
TM
PIPE x1 PHY
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 7
LIST OF TABLES
T
ABLE
3.1
-
B
ALL
O
UT
...................................................................................................10
T
ABLE
3.2
-
N
UMERIC
P
IN
L
IST
......................................................................................11
T
ABLE
3.3
-
A
LPHABETIC
P
IN
L
IST
................................................................................13
T
ABLE
3.4
-
P
IN
D
ESCRIPTIONS
......................................................................................15
T
ABLE
3.5
-
P
ARAMETER OF
B
UFFER
I/O.......................................................................18
T
ABLE
4.1
-
B
ASE
A
DDRESS FOR
R
EGISTERS
..................................................................19
T
ABLE
6.1
-
P
IN
F
UNCTIONS
...........................................................................................32
T
ABLE
7.1
-
DC
V
OLTAGE
S
PECIFICATIONS
...................................................................34
T
ABLE
7.2
-
T
RANSMIT AND
R
ECEIVE
L
ATENCY
T
IME
...................................................34
T
ABLE
7.3
–
T
RANSITION
T
IME OF
P
OWER
S
TATE
.........................................................34
T
ABLE
7.4
-
P
OWER
C
ONSUMPTION OF
E
ACH
P
OWER
S
TATE IN
D
IFFERENT
O
PERATION
M
ODE
.............................................................................................................................35
T
ABLE
7.5
–
T
RANSMITTER
S
ERIAL
O
UTPUT
.................................................................35
T
ABLE
7.6
–
R
ECEIVER
S
ERIAL
O
UTPUT
........................................................................36
T
ABLE
7.7
–
T
EMPERATURE
R
ANGE
...............................................................................36
T
ABLE
7.8
–
T
HERMAL
C
HARACTERISTICS
....................................................................36
T
ABLE
8.1
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
8-
BIT
SDR
M
ODE
...39
T
ABLE
8.2
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
8-
BIT
DDR
M
ODE
...40
T
ABLE
8.3
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
16-
BIT
M
ODE
..........40
T
ABLE
8.4
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
10-
BIT
SDR
M
ODE
.40
T
ABLE
8.5
–
I
NPUT
S
ETUP
,
H
OLD
T
IME AND
O
UTPUT
T
IMING FOR
10-
BIT
DDR
M
ODE
.40
T
ABLE
8.6
–
R
EFERENCE
T
IMING
I
NFORMATION
...........................................................40
T
ABLE
10.1
-
O
RDERING
I
NFORMATION
.........................................................................42
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