參數(shù)資料
型號: GL9711
廠商: Genesys Logic, Inc.
英文描述: PCI ExpressTM PIPE x1 PHY
中文描述: 的PCI ExpressTM管x1物理層
文件頁數(shù): 31/42頁
文件大?。?/td> 423K
代理商: GL9711
GL9711 PCI Express
TM
PIPE x1 PHY
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 31
6.8 Behavior Summary
PD[1:0]
TXDET/LPBK
TXIDLEx
Behavior
0
0
GL9711 is transmitting data from MAC interface normally.
0
1
GL9711 is not transmitting and is in electrical idle.
1
0
GL9711 enters Loopback mode.
P0
1
1
Illegal
X
0
Illegal
P0S
X
1
GL9711 is not transmitting and is in electrical idle.
X
0
Illegal
0
1
GL9711 is idle.
P1
1
1
GL9711 performs a receiver detection.
X
0
GL9711 transmits a beacon.
P2
X
1
GL9711 is idle.
6.9 Power Saving Support
The GL9711 supports four power states including P0, P0s, P1 and P2 and can be controlled to perform Active
State Power Management on a PCI Express link. P0 is the normal operational state where data and control
packets can be transmitted and received. When directed from P0 to a lower power state, the GL9711 can
immediately take appropriate power saving actions. The power saving scheme of the GL9711 for various power
down states is listed in the table below.
PD[1:0]
Transmitter
Receiver
PLL
PCLK Output
P0
On
On
On
On
P0s
High-impedance
Electrical Idle
On
On
On
P1
High-impedance
Electrical Idle
Off but exit from
Electrical Idle is
detectable
On
On
P2
High-impedance
Electrical Idle
(Capable of transmitting
a Beacon)
Off but exit from
Electrical Idle is
detectable
Off
Off
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