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參數(shù)資料
| 型號(hào)： | GL9711 |
| 廠商： | Genesys Logic, Inc. |
| 英文描述： | PCI ExpressTM PIPE x1 PHY |
| 中文描述： | 的PCI ExpressTM管x1物理層 |
| 文件頁(yè)數(shù)： | 36/42頁(yè) |
| 文件大?。?/td> | 423K |
| 代理商： | GL9711 |
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GL9711 PCI Express
TM
PIPE x1 PHY
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 36
voltage
V
TX-RCV-DETECT
The amount of voltage change allowed
during receiver detection
The TX DC common mode voltage
-
-
600
mA
V
TX-DC-CM
0
-
3.6
V
I
TX-SHORT
TX short circuit current limit
-
-
90
mA
T
TX-IDLE-MIN
Minimum time spent in electrical idle
Maximum time to transition to a valid
electrical idle after sending an electrical
idle ordered set
Maximum time to transition to valid TX
specifications after leaving an electrical
idle condition
Differential return loss
50
-
-
UI
T
TX-IDLE-SET-TO-IDLE
-
-
20
UI
T
TX-IDLE-TO-DIFF-DATA
-
-
20
UI
RL
TX-DIFF
12
-
-
dB
RL
TX-CM
Common mode return loss
6
-
-
dB
Z
TX-DIFF-DC
DC differential TX impedance
80
100
120
Ω
C
TX
AC coupling capacitor
75
-
200
nF
Tcrosslink
Crosslink random timeout
0
-
1
ms
l
Receiver Serial Output
Table 7.6
–
Receiver Serial Output
Symbol
Parameter
Min
Typ
Max
Unit
UI
Unit interval
399.88
400
400.12
ps
V
RX-DIFFp-p
Differential input peak to peak voltage
0.175
-
1.2
V
T
RX-EYE
Minimum receiver eye width
Maximum time between the jitter
median and maximum deviation from
the median
AC peak common mode input voltage
0.4
-
-
UI
T
RX-EYE-MEDIAN-to-MAX-JITTER
-
-
0.3
UI
V
RX-CM-ACp
-
-
150
mV
RL
RX-DIFF
Differential return loss
15
-
-
dB
RL
RX-CM
Common mode return loss
6
-
-
dB
Z
RX-DIFF-DC
DC differential input impedance
80
100
120
Ω
Z
RX-DC
DC input impedance
40
50
60
Ω
Z
RX-HIGH-IMP-DC
Powered down DC input impedance
200k
-
-
Ω
V
RX-IDLE-DET-DIFFp-p
T
RX-IDLE-DET-DIFF-ENTERTIME
Unexpected electrical idle enter detect
threshold integration time
Electrical idle detect threshold
65
-
175
mV
-
-
10
ms
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