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參數(shù)資料
| 型號： | GL9711 |
| 廠商： | Genesys Logic, Inc. |
| 英文描述： | PCI ExpressTM PIPE x1 PHY |
| 中文描述： | 的PCI ExpressTM管x1物理層 |
| 文件頁數(shù)： | 34/42頁 |
| 文件大?。?/td> | 423K |
| 代理商： | GL9711 |
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GL9711 PCI Express
TM
PIPE x1 PHY
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 34
CHAPTER 7 ELECTRICAL CHARACTERISTICS
7.1 DC Voltage Specifications
Table 7.1 - DC Voltage Specifications
Symbol
Parameter
Min
Typ
Max
Unit
VDD25
PHY Interface Voltage
2.375
2.5
2.625
V
VDD18
Core Voltage
1.71
1.8
1.89
V
VDD12
Reference Voltage for PHY Inerface
1.1875
1.25
1.3125
V
VDDTX Voltage for Transmitters
1.71
1.8
1.89
V
VDDRX Voltage for Receivers
1.71
1.8
1.89
V
VDDPLL Voltage for PLL
1.71
1.8
1.89
V
7.2 Transmit and Receive Latency Time
Table 7.2 - Transmit and Receive Latency Time
Symbol
Parameter
Min
Typ
Max
Unit
T
TX-LAT
Transmit Latency, time for data moving from
MAC interface (PCLK rising edge) to TX serial
lines (the first bit of 10-bit symbol)
Receive Latency, time for data moving from RX
serial lines (the first bit of 10-bit symbol) to
MAC interface (PCLK rising edge)
25
-
30
ns
T
RX-LAT
48
-
54
ns
7.3 Transition Time of Power State
Table 7.3
–
Transition Time of Power State
Symbol
Parameter
Min
Typ
Max
Unit
T
P0S-P0
Time for PHY to return to P0, after having been
in P0s. Time is measured when PD[1:0] are set to
P0 until the PHY asserts PHYSTS
Time for PHY to return to P0, after having been
in P1. Time is measured when PD[1:0] are set to
P0 until the PHY asserts PHYSTS
Time for PHY to return to P1, after having been
in P2. Time is measured when PD[1:0] are set to
P1 until the PHY asserts PHYSTS
Time for PHY to return to P0s, after having been
in P0. Time is measured when PD[1:0] are set to
P0s until the PHY asserts PHYSTS
Time for PHY to return to P1, after having been
in P0. Time is measured when PD[1:0] are set to
P1 until the PHY asserts PHYSTS
Time for PHY to return to P2, after having been
in P0. Time is measured when PD[1:0] are set to
P2 until the PHY asserts PHYSTS
52
-
74
ns
T
P1-P0
52
-
74
ns
T
P2-P1
16
-
17
μ
s
T
P0-P0S
52
-
74
ns
T
P0-P1
52
-
74
ns
T
P0-P2
16
-
17
μ
s
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PDF描述 |
|---|---|
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| GL9714 | PCI ExpressTM PIPE x4 PHY |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| GL9711-TGGXX | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY |
| GL9714 | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY |
| GL9714-TGGXX | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY |
| GL99 | 制造商:Gem Sound 功能描述:Rack Mount Outlet Strip, With Light |
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