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| 型號(hào)： | FX919A |
| 英文描述： | 4-Level FSK Packet Data Modem |
| 中文描述： | 四級(jí)別FSK信號(hào)分組數(shù)據(jù)調(diào)制解調(diào)器 |
| 文件頁數(shù)： | 22/44頁 |
| 文件大?。?/td> | 1537K |
| 代理商： | FX919A |
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4-Level FSK Modem Data Pump
FX919A
1996 Consumer Microcircuits Limited
22
D/919A/4
RRC Filter Delay
The previous task timing figures are based on the signal at the input to the RRC filter (in transmit mode) or the
input to the de-interleave buffer (in receive mode). There is an additional delay of about 8 symbol times through
to the RRC filter in both transmit and receive modes, as illustrated below:
Symbol-times
Tx Symbol to RRC Filter
Rx Symbol to De-interleave Buffer
Tx Symbol at Txop pin / Rx Symbol from FM discriminator
Figure 12 RRC Low Pass Filter Delay
1.5.5.3
Control Register
This 8-bit write-only register controls the modem's symbol rate, the response times of the receive clock
extraction and signal level measurement circuits and the Frame Sync pattern recognition tolerance.
Control Register B7, B6: CKDIV - Clock Division Ratio
These bits control a frequency divider driven from the clock signal present at the XTALN pin, and hence
determine the nominal symbol rate. The table below shows how symbol rates of 2400/4800/9600 symbols/sec
may be obtained from common Xtal frequencies:
Xtal Frequency (MHz)
4.9152
2.4576
9.8304
B7
0
0
1
1
B6
0
1
0
1
Division Ratio:
Xtal Frequency/Symbol Rate
512
1024
2048
4096
Symbol Rate (symbols/sec)
9600
4800
2400
4800
2400
9600
4800
2400
Note: Device operation is not guaranteed below 2400 or above 9600 symbols/sec.
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| FX919AD2 | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:4-Level FSK Modem Data Pump |
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| FX919B | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:Evaluation Kit User Manual |
| FX929A | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:4-Level FSK Modem Data Pump |
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