
4-Level FSK Modem Data Pump
FX919A
1996 Consumer Microcircuits Limited
16
D/919A/4
When the modem is in receive mode, the μC should wait until the BFREE bit of the Status Register is '1', then
write the desired task to the Command Register.
Once the byte containing the desired task has been written to the Command Register, the modem will:
Set the BFREE bit of the Status Register to '0'.
Wait until enough received symbols are in the De-interleave Buffer.
Decode them as needed, and transfer the resulting binary data to the Data Block Buffer
Then the modem will set the BFREE and IRQ bits of the Status Register to '1', (causing the IRQN
output to go low if the IRQNEN bit of the Mode Register has been set to '1') to tell the μC that it may
read from the Data Block Buffer and write the next task to the modem. If more than 1 byte is contained
in the buffer, byte number 0 of the data will be read out first.
In this way the μC can read data and write a new task to the modem while the received symbols needed for this
new task are being received and stored in the De-interleave Buffer.
BFREE bit of Status Register
for task 1
for task 2
RXIN signal
Task 1
Task 2
Task 1 data
Data from Block Buffer to μC
Task from μC to Command Register
IRQN o/p (IRQNEN = '1')
IRQ bit of Status Register
Figure 9 Receive Task Overlapping
Detailed timings for the various tasks are given in Figures 10 and 11.
FX919A Modem Tasks:
B2
0
0
0
0
B1
0
0
1
1
B0
0
1
0
1
Receive Mode
Transmit Mode
NULL
SFSH
RHB
RILB
NULL
T24S
THB
TIB
Search for FS + Header
Read Header Block
Read Intermediate or Last
Block
Search for Frame Sync
Read 4 symbols
Transmit 24 symbols
Transmit Header Block
Transmit Intermediate Block
1
1
1
1
0
0
1
1
0
1
0
1
SFS
R4S
NULL
RESET
TLB
T4S
NULL
RESET
Transmit Last Block
Transmit 4 symbols
Cancel any current action
Cancel any current action