
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
46
F
USB2
8
0
5
—
USB2
.0
High
-S
pee
d
OTG
Tra
nsc
e
iv
e
rw
ith
UL
P
I
Inter
fac
e
Dynamic Characteristics (Continued)
VCC3V3= VCC-0.1 to 3.6 V; VDD1V2=1.1 V to 1.25 V; VIO=1.65 V to 3.60 V; TJ=-40°C to +85°C; unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max. Unit
ULPI Interface Exiting and Entering Low-Power Mode
tCS
Entering Low-Power Mode Time
From DIR LH Transition-to-CLOCK
Stop (6 Cycles Minimum)
0.145
s
tSTP
From DIR LH Transition STP to LH
Transition
2
s
tWU
Exiting Low-Power Mode
(Total Wake-Up Time)
From STOP LH Transition to DIR HL
Transition
111
s
tCWU
Exiting Low-Power Mode
(Clock Wake-Up Time)
From STOP LH Transition-to-Clock
Start
110.9
s
tCD
Exiting Low-Power Mode
(Clock-to-DIR)
From Clock Start-to-DIR HL Transition
(6 Clock Cycles)
97
ns
Analog I/O Pins
High-Speed Driver Characteristics
tHSR
Differential Rise Time
500
ps
tHSF
Differential Fall Time
500
ps
Full-Speed Driver Characteristics
tFR
Rise Time
CL=50 pF; 10 to 90% of |VOH –VOL|
4
20
ns
tFF
Fall Time
CL=50 pF; 10 to 90% of |VOH –VOL|
4
20
ns
FRFM
Differential Rise Time /
Fall Time Matching
Excluding First Transition from Idle
State
90.0
111.1
%
VCRS
Output Signal Crossover Voltage
Excluding First Transition from Idle
State
1.3
2.0
V
tLR
Rise Time
CL=200pF to 600pF; 1.5 k pull up on
D- enabled; 10 to 90% of |VOH –VOL|
75
300
ns
tLF
Fall Time
CL=200pF to 600pF; 1.5 k pull up on
D- enabled; 10 to 90% of |VOH –VOL|
75
300
ns
LRFM
Differential Rise Time / Fall
Time Matching
Excluding First Transition from Idle
State
80.0
125
%
Serial Mode Driver Timing
tPLHDS
Driver Serial Mode Propagation
Delay (LOW to HIGH)
TX_DAT [D1], TX_SE0 [D2] to D+/D-
20
ns
tPHLDS
Driver Serial Mode Propagation
Delay (HIGH to LOW)
TX_DAT [D1], TX_SE0 [D2] to D+/D-
20
ns
tPHZLZDS
Driver Serial Mode Disable Delay
TX_ENABLE [D0] to D+/D-
12
ns
tPZHZLDS
Driver Serial Mode Enable Delay
TX_ENABLE [D0] to D+/D-
20
ns
Continued on the following page
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