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參數(shù)資料
| 型號： | FDMC2523P_07 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | P-Channel QFET -150V, -3A, 1.5ヘ |
| 中文描述： | P通道QFET - 150伏，三號甲，1.5ヘ |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 177K |
| 代理商： | FDMC2523P_07 |
F
FDMC2523P Rev.C
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Off Characteristics
BV
DSS
Δ
BV
DSS
Δ
T
J
On Characteristics
V
GS(th)
Δ
V
GS(th)
Δ
T
J
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
g
Gate Resistance
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
Q
g
Total Gate Charge
Q
gs
Gate to Source Gate Charge
Drain-Source Diode Characteristics
I
S
Maximum continuous Drain - Source Diode Forward Current
I
SM
Maximum Pulse Drain - Source Doide Forward Current
V
SD
Source to Drain Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I
D
= -250
μ
A, V
GS
= 0V
-150
V
I
D
= -250
μ
A, referenced to 25°C
-138
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= -150V, V
GS
= 0V
-1
-10
±100
μ
A
T
J
= 125°C
I
GSS
Gate to Source Leakage Current
V
GS
= ±30V, V
DS
= 0V
nA
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= -250
μ
A
-3
-3.8
-5
V
I
D
= -250
μ
A, referenced to 25°C
6
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= -10V, I
D
= -1.5A
V
GS
= -10V, I
D
= -1.5A , T
J
= 125°C
V
DS
= -40V, I
D
= -1.5A (Note 4)
1.1
2.0
1.4
1.5
3.6
Ω
g
FS
Forward Transconductance
S
V
DS
= -25V, V
GS
= 0V,
f = 1MHz
200
60
10
7.5
270
80
15
pF
pF
pF
Ω
f = 1MHz
V
DD
= -75V, I
D
= -3A
V
GS
= -10V, R
GEN
= 25
Ω
(Note 3,4)
15
11
19
13
6.2
1.4
27
20
35
24
9
ns
ns
ns
ns
nC
nC
V
GS
= -10V
V
DD
= -75V
I
D
= -3A
(Note 3,4)
Q
gd
Gate to Drain “Miller” Charge
3.3
nC
-3
-12
-5
A
A
V
ns
nC
V
GS
= 0V, I
S
= -3.0A
I
F
= -3.0A, di/dt = 100A/
μ
s
(Note 3)
-1.8
93
0.27
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
2:
I
< -3A, dI/dt < 300A/us, V
DD
< B
, Starting T
J
= 25
°
C
3:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
4:
Essentially independent of operating temperature.
a. 60°C/W when mounted on
a 1 in
pad of 2 oz copper
b.135°C/W when mounted on a
minimum pad of 2 oz copper
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