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參數(shù)資料
| 型號： | FDMB506P |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | P-Channel 1.8V Logic Level PowerTrench MOSFET |
| 中文描述： | 6.8 A, 20 V, 30 ohm, P-CHANNEL, Si, POWER, MOSFET |
| 封裝： | 3 X 1.90 MM, ROHS COMPLIANT, MICROFET-8 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 218K |
| 代理商： | FDMB506P |
FDMB506P Rev C1(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max
Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSS
Gate–Body Leakage
V
GS
= 0 V,
I
D
= –250
μ
A, Referenced to 25
°
C
V
DS
= –16 V,
V
GS
= 0 V
V
GS
= ± 8 V,
V
DS
= 0 V
I
D
= –250
μ
A
–20
V
Breakdown Voltage Temperature
–13
mV/
°
C
μ
A
nA
–1
±100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
(Note 2)
V
DS
= V
GS
,
I
D
= –250
μ
A, Referenced to 25
°
C
V
GS
= –4.5 V, I
D
= –6.8 A
V
GS
= –2.5 V, I
D
= –2.5 A
V
GS
= –1.8 V, I
D
= –1.8 A
V
GS
= –4.5 V, I
D
= –6.8 A, T
J
=125
°
C
I
D
= –250
μ
A
–0.4 –0.7
–1.5
V
Gate Threshold Voltage
3
mV/
°
C
m
25
30
40
36
30
38
70
44
g
FS
Forward Transconductance
V
DS
= –5 V,
I
D
= –6.8 A
26
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
2216
351
167
2960
470
260
pF
pF
pF
V
DS
= –10 V,
f = 1.0 MHz
V
GS
= 0 V,
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
14
8
175
80
21
3.5
4.5
25
16
280
128
30
ns
ns
ns
ns
nC
nC
nC
V
DD
= –10 V,
V
GS
= –4.5 V, R
GEN
= 6
I
D
= –1 A,
V
DS
= –10 V,
V
GS
= –4.5 V
I
D
= –6.8 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
1.6
A
V
GS
= 0 V,
I
S
= –0.8 A
(Note 2)
–0.6
–1.2
V
26
12
48
22
nS
nC
I
F
= –6.8 A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a)
50°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b)
160°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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