參數(shù)資料
型號(hào)： FDC37N958FR
廠商： Electronic Theatre Controls, Inc.
英文描述： Notebook I/O Controller with Enhanced Keyboard and System Control
中文描述： 筆記本電腦的I / O控制器，具有增強(qiáng)型鍵盤和系統(tǒng)控制
文件頁(yè)數(shù)： 241/316頁(yè)
文件大小： 999K
代理商： FDC37N958FR
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SMSC DS – FDC37N958FR
Page 235
Rev. 09/01/99
IRQSER Cycle Control
There are two modes of operation for the
IRQSER Start Frame.
Quiet (Active) Mode
Any device may initiate a Start Frame by driving
the IRQSER low for one clock, while the
IRQSER is Idle. After driving low for one clock
the IRQSER must immediately be tri-stated
without at any time driving high. A Start Frame
may not be initiated while the IRQSER is active.
The IRQSER is Idle between Stop and Start
Frames. The IRQSER is active between Start
and Stop Frames. This mode of operation allows
the IRQSER to be Idle when there are no
IRQ/Data transitions which should be most of
the time.
Once a Start Frame has been initiated the host
controller will take over driving the IRQSER low
in the next clock and will continue driving the
IRQSER low for a programmable period of three
to seven clocks. This makes a total low pulse
width of four to eight clocks. Finally, the host
controller will drive the IRQSER back high for
one clock then tri-state.
Any IRQSER Device (i.e., The FDC37C958)
which detects any transition on an IRQ/Data line
for which it is responsible must initiate a Start
Frame in order to update the host controller
unless the IRQSER is already in an IRQSER
Cycle and the IRQ/Data transition can be
delivered in that IRQSER Cycle.
Continuous (Idle) Mode
Only the Host controller can initiate a Start
Frame to update IRQ/Data line information. All
other IRQSER agents become passive and may
not initiate a Start Frame. IRQSER will be driven
low for four to eight clocks by host controller.
This mode has two functions. It can be used to
stop or idle the IRQSER or the host controller
can operate IRQSER in a continuous mode by
initiating a Start Frame at the end of every Stop
Frame.
An IRQSER mode transition can only occur
during the Stop Frame. Upon reset, IRQSER
bus is defaulted to continuous mode, therefore
only the host controller can initiate the first Start
Frame. Slaves must continuously sample the
Stop Frames pulse width to determine the next
IRQSER Cycle’s mode.
IRQSER Data Frame
Once a Start Frame has been initiated, the
FDC37N958FR will watch for the rising edge of
the Start Pulse and start counting IRQ/Data
Frames from there. Each IRQ/Data Frame is
three clocks: Sample phase, Recovery phase,
and Turn-around phase. During the sample
phase, the FDC37N958FR must drive the
IRQSER (SIRQ pin) low, if and only if, its last
detected IRQ/Data value was low. If its detected
IRQ/Data value is high, IRQSER must be left tri-
stated. During the recovery phase the
FDC37N958FR must drive the SERIRQ high, if
and only if, it had driven the IRQSER low during
the previous sample phase. During the turn-
around phase the FDC37N958FR must tri-state
the SERIRQ. The FDC37N958FR will drive the
IRQSER line low at the appropriate sample point
if its associated IRQ/Data line is low, regardless
of which device initiated the start frame.
The Sample phase for each IRQ/Data follows
the low to high transition of the Start Frame
pulse by a number of clocks equal to the
IRQ/Data Frame times three, minus one (e.g.
The IRQ5 Sample clock is the sixth IRQ/Data
Frame, (6 x 3) - 1 = 17th clock after the rising
edge of the Start Pulse).
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