參數(shù)資料
型號: FDC37C665IR
廠商: SMSC Corporation
英文描述: 3/5 Volt Advanced High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controller with Infranred Support
中文描述: 3 / 5伏先進的高性能多模并口超級I / O軟盤與Infranred支持磁盤控制器
文件頁數(shù): 100/162頁
文件大?。?/td> 562K
代理商: FDC37C665IR
100
Table 40 - ECP Pin Descriptions
NAME
TYPE
O
DESCRIPTION
nStrobe
During write operations nStrobe registers data or address into the slave
on the asserting edge (handshakes with Busy).
Contains address or data or RLE data.
Indicates valid data driven by the peripheral when asserted. This signal
handshakes with nAutoFd in reverse.
This signal deasserts to indicate that the peripheral can accept data.
This signal handshakes with nStrobe in the forward direction. In the
reverse direction this signal indicates whether the data lines contain
ECP command information or data. The peripheral uses this signal to
flow control in the forward direction. It is an "interlocked" handshake
with nStrobe. PeriphAck also provides command information in the
reverse direction.
Used to acknowledge a change in the direction the transfer (asserted =
forward). The peripheral drives this signal low to acknowledge
nReverseRequest.
It
is
an
nReverseRequest. The host relies upon nAckReverse to determine
when it is permitted to drive the data bus.
Indicates printer on line.
Requests a byte of data from the peripheral when asserted,
handshaking with nAck in the reverse direction. In the forward direction
this signal indicates whether the data lines contain ECP address or
data. The host drives this signal to flow control in the reverse direction.
It is an "interlocked" handshake with nAck. HostAck also provides
command information in the forward phase.
Generates an error interrupt when asserted. This signal provides a
mechanism for peer-to-peer communication. This signal is valid only in
the forward direction. During ECP Mode the peripheral is permitted
(but not required) to drive this pin low to request a reverse transfer. The
request is merely a "hint" to the host; the host has ultimate control over
the transfer direction. This signal would be typically used to generate
an interrupt to the host CPU.
Sets the transfer direction (asserted = reverse, deasserted = forward).
This pin is driven low to place the channel in the reverse direction. The
peripheral is only allowed to drive the bi-directional data bus while in
ECP Mode and HostAck is low and nSelectIn is high.
Always deasserted in ECP mode.
PData 7:0
nAck
I/O
I
PeriphAck (Busy)
I
PError
(nAckReverse)
I
"interlocked"
handshake
with
Select
nAutoFd
(HostAck)
I
O
nFault
(nPeriphRequest)
I
nInit
O
nSelectIn
O
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FDC37C665IRQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMSC 功能描述:
FDC37C666GT 制造商:SMSC 制造商全稱:SMSC 功能描述:High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
FDC37C669 制造商:SMSC 制造商全稱:SMSC 功能描述:PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support
FDC37C669_07 制造商:SMSC 制造商全稱:SMSC 功能描述:PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support
FDC37C669FRQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk