參數(shù)資料
型號： FDC37C665GT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 存儲控制器/管理單元
英文描述： High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
中文描述： 1 Mbps, IDE COMPATIBLE, FLOPPY DISK DRIVE CONTROLLER, PQFP100
封裝： QFP-100
文件頁數(shù)： 130/162頁
文件大小： 562K
代理商： FDC37C665GT
130
CR6
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 06H. The default
value of this register after power up is FFH.
This register holds the floppy disk drive types for
up to four floppy disk drives.
CR7
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 07H. The default
value of this register after power up is 00H. This
register holds the value for the auto power
management, floppy boot drive and the polarity
of the media ID bits (see Table 56).
CR8
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 08H. The default
value of this register after power up is 00H. This
is the lower 8 bits for the ADRx address decode.
(Note: All addresses are qualified with AEN.)
CR9
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 09H. The default
value of this register after power up is 00H. This
is the upper 3 bits (D2 - MSB, D0 - LSB) for the
ADRx address decode. If ECP mode is not
selected then A10 is assumed to be low. (Note:
All addresses are qualified with AEN.)
CRA
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 0AH. The default
value of this register after power up is 00H. This
byte defines the FIFO threshold for the ECP
mode parallel port.
CRB
This register indicates the data rate table used
for each drive (see Table 57).
CRC
This register determines the status of the two
UARTs as shown in Table 58.
CRD
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 0DH. This register
is read only. The default value of this register
after power up is 065H for the FDC37C665IR.
CRE
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 0EH. This register
is read only. The default value of this register
after power up is 82H. This is used to identify
the chip revision level.
CRF
This register can only be accessed when the
FDC is in the Configuration Mode and after the
CSR has been initialized to 0FH. The default
value of this register after power up is 00H (see
Table 59).
相關(guān)PDF資料
PDF描述
FDC37C666GT High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
FDC37C67X ENHANCED SUPER I/O CONTROLLER WITH FAST IR
FDC37C957FR ULTRA I/O CONTROLLER FOR PORTABLE APPLICATIONS
FDC37M600 ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
FDC37M601 ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FDC37C665GT_07 制造商:SMSC 制造商全稱:SMSC 功能描述:High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
FDC37C665GT-MS 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller- Pb Free RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
FDC37C665GTQFP 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
FDC37C665IR 制造商:SMSC 制造商全稱:SMSC 功能描述:3/5 Volt Advanced High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controller with Infranred Support
FDC37C665IRQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMSC 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*