參數(shù)資料
型號(hào): FDC37C665GT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
中文描述: 1 Mbps, IDE COMPATIBLE, FLOPPY DISK DRIVE CONTROLLER, PQFP100
封裝: QFP-100
文件頁數(shù): 101/162頁
文件大?。?/td> 562K
代理商: FDC37C665GT
101
Register Definitions
The register definitions are based on the
standard IBM addresses for LPT. All of the
standard printer ports are supported. The
additional registers attach to an upper bit
decode of the standard LPT port definition to
avoid conflict with standard ISA devices. The
port is equivalent to a generic parallel port
interface and may be operated in that mode.
The port registers vary depending on the mode
field in the ecr. The table below lists these
dependencies. Operation of the devices in
modes other that those specified is undefined.
Table 41 - ECP Register Definitions
ADDRESS (Note 1)
+000h R/W
+000h R/W
+001h R/W
+002h R/W
+400h R/W
+400h R/W
+400h R/W
+400h R
+401h R/W
+402h R/W
NAME
ECP MODES
000-001
011
All
All
010
011
110
111
111
All
FUNCTION
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
Data Register
ECP FIFO (Address)
Status Register
Control Register
Parallel Port Data FIFO
ECP FIFO (DATA)
Test FIFO
Configuration Register A
Configuration Register B
Extended Control Register
Note 1: These addresses are added to the parallel port base address as selected by configuration
register or jumpers.
Note 2: All addresses are qualified with AEN. Refer to the AEN pin definition.
Table 42 - Mode Descriptions
DESCRIPTION*
MODE
000
001
010
011
100
101
110
111
SPP mode
PS/2 Parallel Port mde
Parallel Port Data FIFO mode
ECP Parallel Port mode
EPP mode (If this option is enabled in the configuration registers)
(Reserved)
Test mode
Configuration mode
*Refer to ECR Register Description
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