參數(shù)資料
型號(hào): EM78568
廠商: Electronic Theatre Controls, Inc.
英文描述: 8-BIT MICRO-CONTROLLER for FRS
中文描述: 8位微控制器為FRS
文件頁數(shù): 18/54頁
文件大?。?/td> 494K
代理商: EM78568
EM78568
8-bit Micro-controller for FRS
__________________________________________________________________________________________________________________________________________________________________
* This specification are subject to be changed without notice.
07/28/2004 V3.5
User can regulate the contrast of LCD display by IOC5 PAGE0 Bit 0 ~ Bit 3 (BIAS0 ~ BIAS3). Up to 16
levels contrast is convenient for better display.
Bit 3 ~ Bit 6 : (undefined) not allowed to use.
Bit 7 (DETOED) : the interrupt triggering edge control for CTCSS tone detection output
0/1
falling edge/falling and rising
PAGE1 (Counter2 data register)
Bit7
Bit6
Bit5
Bit4
Bit3
CN27
CN26
CN25
CN24
CN23
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Bit 0 ~ Bit 7 (CN20 ~ CN27) : Counter2's buffer that user can read and write.
Counter2 is a 8-bit up-counter with 8-bit prescaler that user can use RD PAGE1 to preset and read the
counter.(write
preset) After a interruption, it will reload the preset value.
Example for writing :
MOV 0x0D, A ; write the data at accumulator to counter2 (preset)
Example for reading :
MOV A, 0x0D ; read the data at counter2 to accumulator
RE (Wake-up control, DAC tone output frequency selection)
PAGE0 (Interrupt flag, Wake-up control bits)
7
6
5
4
3
-
-
-
-
/WUP83
R/W-0
Bit 0 (/WUP80) : PORT80 wake-up control, 0/1
disable/enable P80 pin wake-up function
Bit 1 (/WUP81) : PORT81 wake-up control, 0/1
disable/enable P81 pin wake-up function
Bit 2 (/WUP82) : PORT82 wake-up control, 0/1
disable/enable P82 pin wake-up function
Bit 3 (/WUP83) : PORT83 wake-up control, 0/1
disable/enable P83 pin wake-up function
Bit 4 ~ Bit 7 :
(undefined) not allowed to use
PAGE1 (Programmable D/A tone selection register)
7
6
5
4
3
2
DAT7
DAT6
DAT5
DAT4
DAT3
DAT2
R/W-1
R/W-1
R/W-1
R/W-1 R/W-1
R/W-1
Bit 0 ~ Bit 7 (DAT0 ~ DAT7) : D/A tone output frequency selection
The programmable D/A tone output frequency = 447829Hz / Mi / 32, where Mi = DAT7 ~ DAT0 = 1 ~ 255
When Mi = DAT7 ~ DAT0 = 0 or DAT/DAD(IOCA PAGE1 Bit 7) = 0, the D/A tone output generation
circuit will be disabled. It is specially used for CTCSS tone generation. Also refer to DAC for details
DAC Tone
Gen.
447.829kHz
Bit2
CN22
R/W-0
Bit1
CN21
R/W-0
Bit0
CN20
R/W-0
2
1
0
/WUP82
R/W-0
/WUP81
R/W-0
/WUP80
R/W-0
1
0
DAT1
R/W-1
DAT0
R/W-1
fm =
MUX
DA7~DA0
DAT/DAD
DAT7~DAT0
to DAC input
Fig.5 Programmable DAC tone generation
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