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參數(shù)資料
| 型號(hào)： | csdpram |
| 廠商： | Altera Corporation |
| 英文描述： | Parameterized Cycle-Shared Dual-Port RAM(參數(shù)確定的周期共享雙端口隨機(jī)存儲(chǔ)器) |
| 中文描述： | 參數(shù)化周期共享雙口RAM（參數(shù)確定的周期共享雙端口隨機(jī)存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 26/48頁(yè) |
| 文件大?。?/td> | 293K |
| 代理商： | CSDPRAM |
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Altera Corporation
21
Arithmetic Functions
lpm_counter
Parameterized Counter
The
lpm_counter
function is a full-
featured counter with loading, up/ down
control, clock, and count enabling and
clearing.
Ports (Part 1 of 2)
Name
Type
Required
Description
sset
Input
No
Synchronous set input. Sets the counter on the next active clock edge.
Default = 0. Sets
q[]
outputs to all 1s, or to the value specified by
LPM_SVALUE
. If both
sset
and
sclr
are used and both are asserted,
sclr
is dominant. For outputs such as
q[]
and
eq[]
,
sset
affects the output
before polarity is applied.
Synchronous load input. Loads the counter with data on the next active clock
edge. Default = 0. If
sload
is used,
data[]
must be connected.
Controls the direction of the count. High (1) = count up. Low (0) = count down.
Default = up (1). If the
LPM_DIRECTION
parameter is used, the
updown
port
cannot be connected. If
LPM_DIRECTION
is not used, the
updown
port is
optional.
Count enable input. Disables count when low (0) without affecting
sload
,
sset
, or
sclr
. Default = 1.
Parallel data input to the counter. This port is
LPM_WIDTH
wide. Uses
aload
and/or
sload
.
Positive-edge-triggered clock.
sload
Input
No
updown
Input
No
cnt_en
Input
No
data[]
Input
No
clock
Input
Yes
clk_en
Input
No
Clock enable input. Enables all synchronous activities. Default = 1.
sconst
Input
No
This port is provided only for backwards-compatibility in MAX+PLUS II
pre-version 6.0 designs. Altera does not recommend using this port for new
designs.
Synchronous clear input. Clears the counter on the next active clock edge.
Default = 0. If both
sset
and
sclr
are used and both are asserted,
sclr
is
dominant. For outputs such as
q[]
and
eq[]
,
sclr
affects the output before
polarity is applied.
sclr
Input
No
sset
sload
updown
cnt_en
data[]
clock
clk_en
sconst
sclr
LPM_COUNTER
LPM_SVALUE=
LPM_AVALUE=
LPM_MODULUS=
LPM_DIRECTION=
LPM_WIDTH=
q[]
eq[]
a
a
a
a
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