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參數(shù)資料
| 型號(hào)： | csdpram |
| 廠商： | Altera Corporation |
| 英文描述： | Parameterized Cycle-Shared Dual-Port RAM(參數(shù)確定的周期共享雙端口隨機(jī)存儲(chǔ)器) |
| 中文描述： | 參數(shù)化周期共享雙口RAM（參數(shù)確定的周期共享雙端口隨機(jī)存儲(chǔ)器） |
| 文件頁數(shù)： | 25/48頁 |
| 文件大?。?/td> | 293K |
| 代理商： | CSDPRAM |
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20
Altera Corporation
Arithmetic Functions
Parameters
Name
Required
Value
Description
CHAIN_SIZE
No
Integer > 0
Maximum allowable length of carry chains or cascade
chains in FLEX 10K and FLEX 8000 devices. The default
value is 8. In MAX+PLUS II, this value overrides the value of
the Max. Auto Lengthoption for the Carry Chain or Cascade
Chain logic option(s) in the global project logic synthesis
style, which is specified with the
Global Project Logic
Synthesis
dialog box (Assign menu). For other device
families, varying the
CHAIN_SIZE
parameter will provide
different speed/size combinations—setting smaller values
for
CHAIN_SIZE
generally results in faster and larger
comparators and vice versa. For more information, contact
Altera Applications.
Specifies the number of clock cycles of latency associated
with the
alb
,
aeb
,
agb
,
ageb
,
aneb
, and
aleb
outputs. A
value of zero (0) indicates that no latency exists, and that a
purely combinatorial function will be instantiated. Default
value is 0 (non-pipelined).
Type of comparison performed. The default value is
"UNSIGNED"
.
Width of the
dataa[]
and
datab[]
ports.
LPM_PIPELINE
No
Integer
≥
0
LPM_REPRESENTATION
No
"SIGNED"
"UNSIGNED"
Integer > 0
LPM_WIDTH
Yes
ONE_INPUT_IS_CONSTANT
No
"YES"
"NO"
Provides greater optimization if an input is constant. The
default value is
"NO"
.
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