參數(shù)資料
型號: csdpram
廠商: Altera Corporation
英文描述: Parameterized Cycle-Shared Dual-Port RAM(參數(shù)確定的周期共享雙端口隨機(jī)存儲器)
中文描述: 參數(shù)化周期共享雙口RAM(參數(shù)確定的周期共享雙端口隨機(jī)存儲器)
文件頁數(shù): 18/48頁
文件大?。?/td> 293K
代理商: CSDPRAM
Altera Corporation
13
Gate Functions
lpm_or
Parameterized
OR
Gate
Ports
Parameters
Name
Type
Required
Description
data[][]
Input
Yes
Data input to the
OR
gate(s). This port consists of
LPM_SIZE
buses, each
LPM_WIDTH
wide.
Result of
OR
operators. This port is
LPM_WIDTH
wide.
result[]
Output
Yes
Name
Required
Value
Description
LPM_WIDTH
Yes
Integer > 0
Width of the
data[][]
and
result[]
ports. Number of
OR
gates.
Number of inputs to each
OR
gate. Number of input buses.
LPM_SIZE
Yes
Integer > 0
data[][]
result[]
LPM_OR
LPM_WIDTH=
LPM_SIZE=
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