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參數(shù)資料
| 型號(hào)： | CS5528-ASZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 5/56頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 8CH 24-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 14.8mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個(gè)單端，單極；8 個(gè)單端，雙極 |
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CS5521/22/23/24/28
DS317F8
13
1. GENERAL DESCRIPTION
The CS5521/22/23/24/28 are highly integrated
ΔΣ
Analog-to-Digital Converters (ADCs) which use
charge-balance
techniques
to
achieve
16-bit
(CS5521/23) and 24-bit (CS5522/24/28) perfor-
mance. The ADCs come as either two-channel
(CS5521/22), four-channel (CS5523/24), or eight-
channel (CS5528) devices, and include a low input
current, chopper-stabilized instrumentation ampli-
fier. To permit selectable input spans of 25 mV,
55 mV, 100 mV, 1 V, 2.5 V, and 5 V, the ADCs in-
clude a PGA (programmable gain amplifier). To
accommodate ground-based thermocouple applica-
tions, the devices include a CPD (Charge Pump
Drive) which provides a negative bias voltage to
the on-chip amplifiers.
These devices also include a fourth order DS mod-
ulator followed by a digital filter which provides
eight selectable output word rates of 1.88 Sps,
3.76 Sps, 7.51 Sps, 15 Sps, 30 Sps, 61.6 Sps,
84.5 Sps, and 101.1 Sps (XIN = 32.768 kHz). The
devices are capable of producing output update
rates up to 617 Sps when a 200 kHz clock is used
(CS5522/24/28) or up to 401 Sps using a 130 kHz
clock (CS5521/23). Further note that the digital fil-
ters are designed to settle to full accuracy within
one conversion cycle and simultaneously reject
both 50 Hz and 60 Hz interference when operated
at word rates below 30 Sps (assuming a XIN clock
frequency of 32.768 kHz).
To ease communication between the ADCs and a
micro-controller, the converters include an easy to
use three-wire serial interface which is SPI and
Microwire compatible.
1.1 Analog Input
Figure 4 illustrates a block diagram of the analog in-
put signal path inside the CS5521/22/23/24/28. The
front end consists of a multiplexer (break before
make configuration), a chopper-stabilized instru-
mentation amplifier with fixed gain of 20X,
coarse/fine charge buffers, and a programmable gain
section. For the 25 mV, 55 mV, and 100 mV input
ranges, the input signals are amplified by the 20X in-
strumentation amplifier. For the 1 V, 2.5 V, and 5 V
input ranges, the instrumentation amplifier is by-
passed and the input signals are connected to the
Programmable Gain block via coarse/fine charge
buffers.
VREF+
Differential
4th order
delta-sigma
modulator
Digital
Filter
Programmable
Gain
VREF-
NBV
X20
M
U
X
AIN2+
AIN2-
AIN1+
AIN1-
CS5522
IN+
IN-
AIN4+
AIN4-
*
AIN1+
AIN1-
CS5524
AIN8+
AIN7+
*
AIN1+
CS5528
M
U
X
M
U
X
IN+
IN-
IN+
IN-
IN+
IN-
Figure 4. Multiplexer Configurations
NBV also supplies the negative
supply voltage for the coarse/fine
change buffers
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| CS5530-ISZR | IC ADC 24BIT 1CH W/LNA 20-SSOP |
| CS5534-ASZR | IC ADC 24BIT 4CH W/LNA 24-SSOP |
| CS5534-BSZR | IC ADC 24BIT 4CH W/LNA 24SSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5529 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT PROGRAMMABLE ADC WITH 6 BIT LATCH |
| CS5529_05 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16-bit, Programmable ΔΣ ADC with 6-bit Latch |
| CS5529-AP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Prgrmmbl Delta Sigma ADC w/6-Bit Lat-Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5529AS | 制造商:CIRRUS 功能描述:New |
| CS5529-AS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Prgrmmbl Delta Sigma ADC w/6-Bit Lat-Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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