1.5.1 Conversion Data FIFO Descriptions CS5521/23 (EACH 16-BIT CONVERSIONS) CS5522/24/28 (EACH 24-BIT CONVERSION " />
參數(shù)資料
型號(hào): CS5528-ASZR
廠商: Cirrus Logic Inc
文件頁數(shù): 36/56頁
文件大小: 0K
描述: IC ADC 24BIT 8CH 24-SSOP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 14.8mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極
CS5521/22/23/24/28
DS317F8
41
1.5.1 Conversion Data FIFO Descriptions
CS5521/23 (EACH 16-BIT CONVERSIONS)
CS5522/24/28 (EACH 24-BIT CONVERSION LEVELS)
Conversion Data Bits [23:8 for CS5521/23; 23:0 for CS5522/24/28]
These bits depict the latest output conversion.
OD (Oscillation detect Flag Bit)
0
Bit is clear when oscillatory condition in modulator does not exist (bit is read only).
1
Bit is set any time an oscillatory condition is detected in the modulator. This does not occur under normal
operation conditions, but may occur when the input is extremely overranged. The OD flag will be cleared
to logic 0 when the modulator becomes stable.
OF (Over-range Flag Bit)
0
Bit is clear when over-range condition has not occurred (bit is read only).
1
Bit is set when input signal is more positive than the positive full scale, more negative than zero (unipolar
mode) or when the input is more negative than the negative full scale (bipolar mode).
CI (Channel Indicator Bits) [1:0]
These bits indicate which physical input channel was converted.
00
Physical Channel 1 (CS5521/23 only)
01
Physical Channel 2 (CS5521/23 only)
10
Physical Channel 3 (CS5523 only)
11
Physical Channel 4 (CS5523 only)
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
MSB
14
13
12
11
10
9
8
7
654
D11
D10
D9
D8
D7
D6
D5
D4D3D2D1D0
3
2
1
LSB
1
0
CI1
CI0
OD
OF
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
MSB
2221
2019
18
17
16
15
14
13
12
D11
D10
D9
D8
D7
D6
D5
D4D3D2D1D0
11
10
9
8
7
6
5
4
3
2
1
LSB
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