參數(shù)資料
型號(hào)： CL-PS7110-VC-A
廠商： CIRRUS LOGIC INC
元件分類(lèi)： 微控制器/微處理器
英文描述： Low-Power System-on-a-Chip
中文描述： MROM, RISC MICROCONTROLLER, PQFP208
封裝： VQFP-208
文件頁(yè)數(shù)： 64/82頁(yè)
文件大?。?/td> 1101K
代理商： CL-PS7110-VC-A
DATA BOOK v1.5
May 1997
64
ELECTRICAL SPECIFICATIONS
CL-PS7110
Low-Power System-on-a-Chip
extended by integer multiples of the clock period (54 ns), by either driving EXPRDY low and or by program-
ming a number of wait states. EXPRDY is sampled on the falling edge of EXPCLK before the data transfer,
if low at this point the transfer is delayed by one clock period where EXPRDY is sampled again. EXPCLK
need not be referenced when driving EXPRDY but is shown for clarity.
2)
Consecutive reads with sequential access enabled are identical except that the sequential access wait state
field is used to determine the number of wait states.
Figure 4-2. Expansion and ROM Write Timing
NOTES:
1)
t
EXWR
= 80 ns maximum for zero wait states. This time can be extended by integer multiples of the clock
period (54 ns), by either driving EXPRDY low and or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer, if low at this point the transfer is delayed by
one clock period where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY
but is shown for clarity.
2)
Consecutive writes with sequential access enabled are identical except that the sequential access wait state
field is used to determine the number of wait states.
3)
Zero wait states for sequential writes is not supported, one state automatically is added.
EXPCLK
BUS HELD
t
5
t
8
t
6
t
2
NMWE
A[27:0]
D[31:0]
WRITE DATA
WORD
NCS[3:0]
CS[7:4]
EXPRDY
t
7
Consecutive expansion write cycles with minimum wait states
t
2
t
EXWR
t
EXWR
t
8
t
24
WRITE DATA
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