
DATA BOOK v1.5
May 1997
4
TABLE OF CONTENTS
CL-PS7110
Low-Power System-on-a-Chip
TABLE OF CONTENTS
LIST OF TABLES..............................................................................................7
LIST OF FIGURES............................................................................................8
CONVENTIONS................................................................................................9
FUNCTIONAL DESCRIPTION.......................................................................11
Overview..............................................................................................................................11
General................................................................................................................................12
Clocking............................................................................................................................13
CPU Core.........................................................................................................................13
Interrupt Controller............................................................................................................13
Memory Interface and DMA..............................................................................................14
Expansion and Memory Controller for SRAM/ROM/Flash Interface.................................17
DRAM Controller ..............................................................................................................19
PCMCIA Support..............................................................................................................19
Codec Interface ................................................................................................................21
Synchronous Serial Interface ...........................................................................................21
1.2.10 LCD Controller..................................................................................................................21
1.2.11 Internal UART and SIR Encoder.......................................................................................22
1.2.12 Timer Counters.................................................................................................................23
1.2.13 Realtime Clock .................................................................................................................23
1.2.14 DC-to-DC Converter.........................................................................................................23
1.2.15 Keyboard Control..............................................................................................................26
1.2.16 GPIO.................................................................................................................................26
1.2.17 Buzzer Control..................................................................................................................26
1.2.18 Battery Management........................................................................................................27
1.2.19 State Control.....................................................................................................................27
1.2.20 Power Management..........................................................................................................28
1.2.21 Software Model for Power Management...........................................................................29
1.2.22 Resets ..............................................................................................................................29
2.
PIN INFORMATION........................................................................................31
2.1
Pin Diagram.........................................................................................................................31
2.2
Pin Description Conventions................................................................................................32
2.3
Pin Descriptions...................................................................................................................32
2.4
Pin Descriptions...................................................................................................................35
3.
PROGRAMMING INTERFACE.......................................................................39
3.1
Memory Map........................................................................................................................39
3.2
Internal Registers.................................................................................................................40
3.2.1
PADR — Port A Data Register .........................................................................................41
3.2.2
PBDR — Port B Data Register.........................................................................................41
3.2.3
PCDR — Port C Data Register.........................................................................................42
3.2.4
PDDR — Port D Data Register.........................................................................................42
3.2.5
PADDR — Port A Data Direction Register........................................................................42
3.2.6
PBDDR — Port B Data Direction Register .......................................................................42
3.2.7
PCDDR — Port C Data Direction Register.......................................................................42
3.2.8
PDDDR — Port D Data Direction Register.......................................................................42
1.
1.1
1.2
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9