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參數(shù)資料
| 型號： | CL-PS7110-VC-A |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low-Power System-on-a-Chip |
| 中文描述： | MROM, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | VQFP-208 |
| 文件頁數(shù)： | 14/82頁 |
| 文件大小： | 1101K |
| 代理商： | CL-PS7110-VC-A |
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DATA BOOK v1.5
May 1997
14
FUNCTIONAL DESCRIPTION
CL-PS7110
Low-Power System-on-a-Chip
1.2.4
Memory Interface and DMA
The CL-PS7110 memory controller is designed for maximum flexibility. Requests for external memory
accesses from the ARM710A are decoded and the appropriate external memory access or internal bus
cycle is initiated accordingly.
There are two main external memory interfaces:
G
DRAM controller
G
Expansion memory controller for SRAM/FLASH/ROM
The CL-PS7110 provides a DMA controller (see
Section 1.2.5
) that allows video display data for the LCD
controller to be fetched directly from main DRAM memory, independent of internal CL-PS7110 activity.
Bus cycles generated by the CL-PS7110 depend on the requester and the target. The possible requesters
are the ARM710A core, the DMA controller and the DRAM refresh controller. The two types of targets are
DRAM banks and ROM/expansion banks. A data transfer may take multiple bus cycles. The arbitration for
the bus is at the beginning of a transfer. The priority is fixed with DMA highest, then refresh, followed by
the ARM710A. Once granted the bus, the maximum burst to a ROM/expansion bank is four bus cycles,
regardless of the transfer width. The ARM710A core can produce byte, word, multi-word accesses. Multi-
Table 1-1.
Interrupt Allocation
Interrupt
Bit in Mask
and ISR
Name
Comment
FIQ
0
EXTFIQ
External fast interrupt input (NEXTFIQ pin).
FIQ
1
BLINT
Battery low interrupt.
FIQ
2
WEINT
Watch dog expired interrupt.
FIQ
3
MCINT
Media changed interrupt.
IRQ
4
CSINT
Codec sound interrupt.
IRQ
5
EINT1
External interrupt input 1 (NEINT1 pin).
IRQ
6
EINT2
External interrupt input 2 (NEINT2 pin).
IRQ
7
EINT3
External interrupt input 3 (EINT3 pin).
IRQ
8
TC1OI
TC1 under flow interrupt.
IRQ
9
TC2OI
TC2 under flow interrupt.
IRQ
10
RTCMI
RTC compare match interrupt.
IRQ
11
TINT
64-Hz tick interrupt.
IRQ
12
UTXINT
Internal UART transmit FIFO empty interrupt.
IRQ
13
URXINT
Internal UART receive FIFO full interrupt.
IRQ
14
UMSINT
Internal UART modem status changed interrupt.
IRQ
15
SSEOTI
Synchronous serial interface end of transfer interrupt.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CL-PS7110-VI-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7111 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
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| CL-PS7111-VC-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
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