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參數(shù)資料
| 型號： | CE5038 |
| 廠商： | Intel Corp. |
| 英文描述： | DVB-S2 Advanced Modulation Satellite Tuner |
| 中文描述： | DVB - S2的先進調(diào)制衛(wèi)星調(diào)諧器 |
| 文件頁數(shù)： | 28/41頁 |
| 文件大?。?/td> | 463K |
| 代理商： | CE5038 |
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CE5038
Data Sheet
27
Intel Corporation
3.4.13 Baseband Filter Resistor Switching (RSD)
The baseband filters use a resistor switching technique that improves bandwidth and phase matching between the
I and Q channels. The bandwidth range is effectively separated into 3 sub-ranges with different resistor values
being used in each sub-range. It is possible for the filter bandwidth accuracy to be degraded if the bandwidth setting
happens to coincide with one of the two transition points between these regions. This can be overcome by disabling
the resistor switching using the
RSD
bit. For optimum filter performance the
RSD
bit should first be enabled so that
the correct resistor value is automatically set for the selected bandwidth.
The
RSD
bit (bit-3 of byte-6) controls the resistor switching. With the default setting of logic '0' it is enabled and the
correct resistor value automatically chosen. With the
RSD
bit set to a logic '1' then the switching is disabled and this
freezes the resistors at their chosen value. The procedure when selecting a new bandwidth setting is to enable then
disable the switching; set
RSD
to logic '0' then to logic '1'.
3.4.14 Baseband Filter Bandwidth (BF6:1 & BR4:0 Bits)
Bits 6 to 1 of byte-7 configure bits
BF6
to
BF1
respectively. These bits set a decimal number in the range 0 to 62
(63 is not allowed) to determine the baseband filter bandwidth in conjunction with other values.
Bits 6 to 2 of byte-13 configure bits
BR4
to
BR0
respectively. These bits set the reference divider ratio for the
baseband filter. A number in the range 4 to 27 inclusive (values outside this range are not allowed) can be set, with
the proviso that the value of f
xtal
/BR4:0 must also be in the range 575 kHz to 2,500 kHz.
For further details, please also see “Baseband Filter” (sect. 2.4) on page 16 and “Symbol Rate and Filter
Calculations” (sect. 4.3) on page 30.
3.4.15 Band Switch Algorithm (VSD Bit)
The controller, which tunes to the appropriate LO and sub band for optimum phase noise performance, can be
disabled with the
VSD
bit, if required, allowing manual control. The
VSD
bit is programmed using byte-9, bit-7. The
default is for the controller to be enabled,
VSD
= ‘0’, and to disable the controller a logic ‘1’ is written to this bit.
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