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    參數(shù)資料
    型號: C3ENPA1-DD
    廠商: Motorola, Inc.
    元件分類: 網(wǎng)絡(luò)處理器
    英文描述: C-3e NETWORK PROCESSOR SILICON REVISION A1
    中文描述: ? - 3E的網(wǎng)絡(luò)處理器硅版本格A1
    文件頁數(shù): 85/114頁
    文件大小: 746K
    代理商: C3ENPA1-DD
    AC Timing Specifications
    85
    MOTOROLA GENERAL BUSINESS INFORMATION
    C3ENPA1-DS/D REV 03
    OC-3 Timing Specifications
    The OC-3 interface timing is shown in
    Figure17
    and described in
    Table42
    .
    Figure 17
    OC-3 Timing Diagram
    Cycle 1
    Cycle 2
    Cycle 3
    Cycle 4
    Cycle 5
    CPn_2
    Cycle 1
    Cycle 2
    Cycle 3
    Cycle 4
    Cycle 5
    CPn_3
    CPn_0
    CPn_1
    CPn_4
    CPn_5
    T
    c3t
    T
    c3r
    T
    c3d
    T
    c3i
    T
    c3s
    T
    c3h
    T
    c3s
    T
    c3h
    Table 42
    OC-3 Timing Description
    SYMBOL
    PARAMETER
    MIN
    TYP
    MAX
    UNIT
    Tc3t
    OC-3 Transmit Cycle Time
    6.43
    ns
    Tc3i
    OC-3 Pulse Width
    2.0
    ns
    Tc3r
    OC-3 Receive Cycle Time*
    *
    155.52MHz
    6.0
    ns
    Tc3d
    OC-3 Clock Duty Cycle
    40
    60
    %
    Tc3s
    OC-3 Setup Time
    2.0
    ns
    Tc3h
    OC-3 Hold Time
    0.0
    ns
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