參數(shù)資料
型號: C3ENPA1-DD
廠商: Motorola, Inc.
元件分類: 網(wǎng)絡處理器
英文描述: C-3e NETWORK PROCESSOR SILICON REVISION A1
中文描述: ? - 3E的網(wǎng)絡處理器硅版本格A1
文件頁數(shù): 27/114頁
文件大?。?/td> 746K
代理商: C3ENPA1-DD
MOTOROLA GENERAL BUSINESS INFORMATION
C3ENPA1-DS/D REV 03
C3ENPA1-DS/D
Rev 03
Chapter 2
SIGNAL DESCRIPTIONS
Signal Summary
There are nine (9) functional groupings of signals in the C-3e Network Processor:
Clock
7 pins
Channel Processors (CP0 - CP7)
8x7 = 56 pins
Executive Processor (XP)
57 pins
PCI Interface
50 pins
PROM Interface
4 pins
Serial Bus Interface
2 pins
General System Interface
1 pin
Fabric Processor (FP)
42 pins
Buffer Management Unit (BMU)
160 pins
Table Lookup Unit (TLU)
99 pins
Queue Management Unit (QMU)
59 pins
Power
234 pins
Test
14 pins
Two (2) of the sections (CPs and FP) are configurable, depending on the type of device
being implemented.
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