- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1906 > BBT3420-SN (Intersil)TXRX QUAD MULTI-RATE 289-EBGA PDF資料下載
參數(shù)資料
| 型號： | BBT3420-SN |
| 廠商： | Intersil |
| 文件頁數(shù)： | 19/38頁 |
| 文件大小： | 0K |
| 描述： | TXRX QUAD MULTI-RATE 289-EBGA |
| 標準包裝： | 84 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | XAUI，XGMII，MDC/MDIO |
| 電源電壓： | 1.7 V ~ 1.9 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 289-BGA |
| 供應商設(shè)備封裝： | 289-BGA（19x19） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁
26
TABLE 4-6. MISCELLANEOUS PINS
PIN#
NAME
TYPE
DESCRIPTION
P1
CODE
Input
(w/pullup)
Encode Enable, When CODE is high, the 8b/10b encoder and decoder are enabled,
provided the CODECENA bit is set, see Table 3-16 and/or Table 3-32. When CODE
is low, the encoder and decoder are disabled, and the Parallel side handles raw 10b
data.
A16, B16, T16, U16
MF[A:D]
Output (MFC
and MFD are
inputs w/pullup
during reset).
Multi-function I/O's, Channels [A:D]. The functions of these pins are enabled via the
MDIO. Currently defined functions are: FIFO_ERR for each channel, for TX, Align
and Elasticity FIFOs. LOS (Loss of Signal) for each channel, RC[A:D]: Recovered
clock outputs COMMA_DET (K28.5 character detected) for each channel, and
BIST_ERR (Built-In Self Test Pseudo Random Bit Stream Test Status) for each
channel. The default condition for these pins is BIST_ERR. See Table 3-15 and/or
Table 3-33 for further details. MFC and MFD are also used as inputs during reset, to
control the MDIO interface DEVAD value, see Table 3-5.
C1
PSYNC
Input
(w/pulldown)
Channel Synchronization Enable. When PSYNC is high, all transmit data is latched
on the rising and falling edges of TCA, all receive data is valid on the rising and falling
edges of RCA.
B1
RSTN
Input
Chip Reset (FIFO Clear)
C3, D3, P3, R3
LPEN(A-D)
Input
(w/pulldown)
Loop Enable, Channels A-D. When high, the serial output for each channel is looped
back to its input.
D1
SIG_DET
Output
SIG_DET. This pin is asserted when all four Signal Detectors detect signal levels
above the threshold (see Table 3-28 and/or Table 3-33).
U1
RSVN/
RETIMER
Input
(w/pullup)
Active Low If low, the BBT3420 acts as a Retimer device, rather than a transceiver
(SerDes) device.
P2
BISTEN
Input
(w/pulldown)
Built-In Self Test Enable--Active High. When high, enables internal 23-bit PRBS test
function.
TABLE 4-7. VOLTAGE SUPPLY AND REFERENCE PINS
PIN#
NAME
TYPE
DESCRIPTION
J17
VREF
Input
Parallel Side Input Voltage Reference
C2
REFP
Input
When REFP pin is tied to VDDQ, MF[A-D] are the receiver
complementary clock outputs MFA = RCANMFB = RCBNMFC =
RCCNMFD = RCDN When REFP pin is left as no-connect or tied to
low, MF[A-D] are the multi-function I/O's as defined in Table 4-6
D2
REFN
Input
No Connect Terminal (internal inactive resistor for test purposes.)
J1
RREF
Input
Additional Resistor Terminal (N.C.)
A9, A12, A15, A17, D8, D11, D14, D17, G14, G17,
J14, J16, L14, L17, P8, P11, P14, P17, U9, U12,
U15, U17
VDDQ
Supply
Control and Parallel Input/Output Supply Voltage
D4, D7, E4, H1, H4, J4, K1, K4, N4, P4, P7
VDD
Supply
Internal (Core) Supply
A5, A6, A7, C5, C6, F1, F3, G1, G3, L1, L3, M1,
M3, R5, R6, U5, U6, U7
VDDA
Analog Supply Analog Supply. Should be decoupled from VDD
B9, B12, B15, B17, E5, E6, E7, E8, E11, E14, E17,
H2, H3, H5, H14, H17, J5, K2, K3, K5, K14, K17,
N5, N6, N7, N8, N11, N14, N17, T9, T12, T15, T17
GND
Ground
Ground for Core, Control and Parallel Input/Outputs.
A4, B4, B7, C4, C7, E1, E2, E3, F5, G5, L5, M5,
N1, N2, N3, R4, R7, T4, T7, U4
GNDA
Analog Ground Analog Ground. Should be connected to GND at one point.
F6, F7, F8, F9, F10, F11, F12, G6, G7, G8, G9,
G10, G11,G12, H6, H7, H8, H9, H10, H11, H12,
J6, J7, J8, J9, J10, J11, J12, K6, K7, K8, K9, K10,
K11, K12, L6, L7, L8, L9, L10, L11, L12, M6, M7,
M8, M9, M10, M11, M12
T-GND
Ground
Thermal Grounds. Electrically tied to Ground, but used to improve
thermal transfer to mounting medium (PCB).
BBT3420
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BD3843FS-E2 | IC SOUND PROCESSOR 6CH 24SSOP |
| BD9251FV-E2 | IC PREAMP HBD PIR SENSOR 14-SSOP |
| BGF 104C E6327 | IC HSMMC FILTER/ESD PROT S-WLP-6 |
| BGF 104C E6328 | IC HSMMC FILTER/ESD PROT WLP-16 |
| BGF 110 E6327 | IC MEMORY CARD PROTECT S-WLP-24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BBT3421 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:4 Channel Multi-rate Intelligent CMOS Re-Timer |
| BBT3821 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Octal 2.488Gbps to 3.187Gbps/ Lane Retimer |
| BBT3821-JH | 功能描述:IC RE-TIMER OCTAL 192-BGA RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| BBT3821LP-JH | 功能描述:IC RE-TIMER OCTAL 192-BGA RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| BBTEKIT | 功能描述:剝線和切削工具 COMPR AND STRIP TOOL KIT FOR RG59 RG6 CBL RoHS:否 制造商:Molex 產(chǎn)品:Cable Strippers 類型: 描述/功能:Stripper |
發(fā)布緊急采購，3分鐘左右您將得到回復。