參數(shù)資料
型號: ATMEGA329V-8MUR
廠商: Atmel
文件頁數(shù): 38/146頁
文件大?。?/td> 0K
描述: MCU AVR 32K FLASH 8MHZ 64QFN
產(chǎn)品培訓模塊: megaAVR Introduction
標準包裝: 4,000
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART,USI
外圍設(shè)備: 欠壓檢測/復位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 54
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
其它名稱: ATMEGA329V-8MUR-ND
ATMEGA329V-8MURTR
2010-2012 Microchip Technology Inc.
DS41440C-page 285
PIC16(L)F1825/1829
25.6.13.3
Bus Collision During a Stop
Condition
Bus collision occurs during a Stop condition if:
a)
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out. (CASE 1)
b)
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high. (CASE 2)
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPxADD and
counts down to zero. After the BRG times out, SDAx is
sampled. If SDAx is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 25-38). If the SCLx pin is
sampled low before SDAx is allowed to float high, a bus
collision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 25-39).
FIGURE 25-38:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 25-39:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
SDAx asserted low
SDAx sampled
low after TBRG,
set BCLxIF
‘0’
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
Assert SDAx
SCLx goes low before SDAx goes high,
set BCLxIF
‘0’
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