
[AK4683] 
MS0427-E-02 
2007/04 
- 5 - 
PIN/FUNCTION 
No. 
1 
2 
Pin Name 
PVDD 
RX0 
I/O 
- 
I 
Function 
PLL Power supply Pin, 4.5V
~
5.5V 
Receiver Channel 0 Pin (Internal biased pin. Internally biased at PVDD/2) 
Control Mode Select Pin. 
“L”: 4-wire Serial, “H”: I
2
C Bus 
Receiver Channel 1 Pin  
Receiver Channel 2 Pin  
Receiver Channel 3 Pin  
Interrupt Pin 
V-bit Output Pin for Receiver Input 
Zero Input Detect Pin  
When the input data of DAC follow total 8192 LRCK cycles with “0” input data, this 
pin goes to “H”. And when RSTN1 bit is “0”, PWDA bit is “0”, this pin goes to “H”. 
Analog Input Overflow Detect Pin 
This pin goes to “H” if the analog input of Lch or Rch overflows. 
Control Data Output Pin in Serial Mode and I2C pin = “L”. 
Channel Clock B Pin 
Audio Serial Data Clock B Pin  
Audio Serial Data Output B Pin  
Output Channel Clock A Pin 
Input Channel Clock A Pin 
Audio Serial Data Clock A Pin 
Audio Serial Data Output A Pin  
Master Clock Output Pin 
Output Buffer Power Supply Pin, 2.7V
~
5.5V 
Digital Ground Pin, 0V 
Digital Power Supply Pin, 4.5V
~
5.5V 
X'tal Input Pin 
X'tal Output Pin 
Transmit Channel Output pin 
When DIT bit = “0”, RX0~3 Through. 
When DIT bit = “1”, Internal DIT Output. 
Master Clock Input Pin 
Power-Down Mode & Reset Pin 
When “L”, the AK4683 is powered-down, all registers are reset. And then all digital 
output pins go “L”. The AK4683 must be reset once upon power-up. 
Control Data Input Pin in Serial Mode and I2C pin = “L”. 
Control Data Pin in Serial Mode and I2C pin = “H”. 
Control Data Clock Pin in Serial Mode and I2C pin = “L” 
Control Data Clock Pin in Serial Mode and I2C pin = “H” 
Chip Select Pin in Serial Mode and I2C pin = “L”. 
This pin should be connected to DVSS in Serial Mode and I2C pin = “H”. 
Audio Serial Data Input A1 Pin 
Audio Serial Data Input A2 Pin 
Audio Serial Data Input A3 Pin 
Audio Serial Data Input B Pin 
HP Power Supply Pin, 4.5V
~
5.5V 
HP Ground Pin, 0V 
HP Rch Output Pin 
HP Lch Output Pin 
HP Common Voltage Output Pin 
1
μ
F capacitor should be connected to HVSS externally. 
3 
I2C 
I 
4 
5 
6 
7 
RX1 
RX2 
RX3 
INT 
VOUT 
I 
I 
I 
O 
O 
DZF 
O 
8 
OVF 
O 
9 
10 
11 
12 
13 
14 
15 
16 
17 
18 
19 
20 
21 
22 
CDTO 
LRCKB 
BICKB 
SDTOB 
OLRCKA 
ILRCKA 
BICKA 
SDTOA 
MCKO 
TVDD 
DVSS 
DVDD 
XTI 
XTO 
O 
I/O 
I/O 
O 
I/O 
I/O 
I/O 
O 
O 
- 
- 
- 
I 
O 
23 
TX 
O 
24 
MCLK2 
I 
25 
PDN 
I 
CDTI 
SDA 
CCLK 
SCL 
CSN 
TEST 
SDTIA1 
SDTIA2 
SDTIA3 
SDTIB 
HVDD 
HVSS 
HPR 
HPL 
I 
26 
I/O 
I 
I 
I 
I 
I 
I 
I 
I 
- 
- 
O 
O 
27 
28 
29 
30 
31 
32 
33 
34 
35 
36 
37 
MUTET 
-