- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385094 > AK4683_07 (Asahi Kasei Microsystems Co.,Ltd) Asynchronous Multi-Channel Audio CODEC with DIR/T PDF資料下載
參數(shù)資料
| 型號(hào)： | AK4683_07 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| 中文描述： | 異步多聲道音頻編解碼器署長/噸 |
| 文件頁數(shù)： | 43/84頁 |
| 文件大小： | 1077K |
| 代理商： | AK4683_07 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當(dāng)前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
[AK4683]
MS0427-E-02
2007/04
- 43 -
■
Status of analog output pins during power-down (PDN pin =”L”)
The status of analog output pins is as follows.
Pin Name
HPL/HPR
LOUT1/ROUT1/LOUT2/ROUT2
LISEL/RISEL
■
Reset Function
When RSTN1 bit = “0”, ADC and DACs are powered-down but the internal register are not initialized. The analog
outputs go to VCOM voltage, DZF/OVF pin goes to “H” and SDTOA/B pins go to “L”. Because some click noise
occurs, the analog output should be muted externally if the click noise influences system application. The Figure 24
shows the power-up sequence.
HVSS
VCOM
Hi-Z
ADC Internal
State
RSTN bit
Normal Operation
Digital Block Power-down
Normal Operation
Don’t care
GD
GD
Clock In
MCLK,LRCK,SCLK
ADC In
(Analog)
“0”data
ADC Out
(Digital)
Normal Operation
Normal Operation
DAC Internal
State
“0”data
DAC In
(Digital)
DAC Out
(Analog)
GD
GD
(2)
(2)
(3)
(4)
(6)
(6)
DZF1/DZF2
(7)
Internal
RSTN bit
Digital Block Power-down
1~2/fs (9)
4~5/fs (9)
4
～
5/fs (8)
(5)
516/fs
Init Cycle
(1)
Notes:
(1) The analog part of ADC is initialized after exiting the reset state.
(2) Digital output corresponding to analog input and analog output corresponding to digital input have the group
delay (GD).
(3) ADC output is “0” data at the power-down state.
(4) Click noise occurs when the internal RSTN bit becomes “1”. Please mute the digital output externally if the click
noise influences system application.
(5) When RSTN1 bit = “0”, the analog outputs go to VCOM voltage.
(6) Click noise occurs at 4
～
5/fs after RSTN1 bit becomes “0”, and occurs at 1
～
2/fs after RSTN1 bit becomes “1”.
This noise is output even if “0” data is input.
(7) The external clocks (MCLK, BICKA (BICKB), LRCKA (LRCKB)) can be stopped in the reset mode. When
exiting the reset mode, “1” should be written to RSTN1 bit after the external clocks (MCLK, BICKA (BICKB),
LRCKA (LRCKB)) are fed.
(8) DZF pins go to “H” when the RSTN1 bit becomes “0”, and go to “L” at 6~7/fs after RSTN1 bit becomes “1”.
(9) There is a delay, 4~5/fs from RSTN1 bit “0” to the internal RSTN bit “0”.
Figure 24. Reset sequence example
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4683EQ | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683 | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4702EQ | 2ch DAC with AV SCART switch |
| AK4702 | 2CH DAC WITH AV SCART SWITCH |
| AK4703 | AV SCART switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4683EQ | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683EQP | 制造商:AKM Semiconductor Inc 功能描述:Audio Codec 2ADC / 4DAC 24-Bit 64-Pin LQFP |
| AK4685 | 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with Differential Analog I/O |
| AK4685EQ | 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with Differential Analog I/O |
| AK4686 | 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with Capless Stereo Selector |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。