參數(shù)資料
型號： AK4683_07
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Asynchronous Multi-Channel Audio CODEC with DIR/T
中文描述： 異步多聲道音頻編解碼器署長/噸
文件頁數(shù)： 29/84頁
文件大?。?/td> 1077K
代理商： AK4683_07
[AK4683]
MS0427-E-02
2007/04
- 29 -
■
ADC, DAC Control
There are two modes for controlling the sampling speed for ADC and DAC. One is the Manual Setting Mode using the
DFSAD1-0, DFSDA1-0 bits, and the other is Auto Setting Mode. When the block connects to both PORTA and
PORTB, the PORTA setting is used.
1. Manual Setting Mode (ACSKAD / ACSKDA bit = “0”: Default)
When the ADC and DAC are connected to each PORT placed in Manual Setting Mode, the sampling speed are selected
by DFSAD, DFSDA1-0 bits (Table 21, Table 22). The frequencies and the duties of the clocks (ILRCKA, OLRCKA,
LRCKB, BICKA, BICKB) may be unstable for the moment when changing the sampling speed mode.
DFSAD0
Sampling Speed (fs)
0
Normal Speed Mode
1
Double Speed Mode
32kHz~48kHz
64kHz~96kHz
(default)
Table 21.ADC sampling speed (Manual Setting Mode)
Sampling Speed (fs)
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Not Available
Table 22.DAC sampling speed (Manual Setting Mode)
DFSDA1
0
0
1
1
DFSDA0
0
1
0
1
32kHz~48kHz
64kHz~96kHz
120kHz~192kHz
-
(default)
LRCKA
(LRCKB)
fs
32.0kHz
44.1kHz
48.0kHz
MCLK (MHz)
BICKA (BICKB)
(MHz)
64fs
2.0480
2.8224
3.0720
256fs
8.1920
11.2896
12.2880
(Normal Speed Mode @Manual Setting Mode)
384fs
12.2880
16.9344
18.4320
512fs
16.3840
22.5792
24.5760
Table 23. System clock example
MCLK (MHz)
LRCKA
(LRCKB)
fs
88.2kHz
96.0kHz
BICKA (BICKB)
(MHz)
64fs
5.6448
6.1440
128fs
11.2896
12.2880
(Double Speed Mode @Manual Setting Mode)
(Note: ADC is not available for 128fs and 192fs at Double Speed Mode (DFSAD=“1”))
Table 24. System clock example
192fs
16.9344
18.4320
256fs
22.5792
24.5760
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4683EQ 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T
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AK4686 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with Capless Stereo Selector
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