參數(shù)資料
型號： AK4671EG
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/RCV/HP-AMP
中文描述： 立體聲編解碼器麥克風/垃圾車/惠普腺苷
文件頁數(shù)： 97/164頁
文件大?。?/td> 1792K
代理商： AK4671EG
[AK4671]
MS0666-E-00
2007/10
- 97 -
■
Full-differential Mono Line Output (LOP/LON pins)
When LODIF bit = “1”, LOUT3/ROUT3 pins become LOP/LON pins, respectively. Lch/Rch signal of DAC or
LIN1/RIN1/LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 is output from the LOP/LON pins which is full-differential as (L+R)
signal. The load impedance is 10k
Ω
(min) for LOP and LON pins, respectively. When the PMLO3 = PMRO3 bits = “0”,
the mono line output enters power-down mode and the output is pulled-down to VSS1. When the PMLO3 = PMRO3 bits
= “1” and LOPS3 bit = “1”, mono line output enters power-save mode. Pop noise at power-up/down can be reduced by
changing PMLO3 and PMRO3 bits at LOPS3 bit = “0”. When PMLO3 = PMRO3 bits = “1” and LOPS3 bit = “0”, mono
line output enters in normal operation. L3VL1-0 bits set the volume of mono line output.
L3VL1-0
Attenuation
3H
+9dB
2H
+6dB
1H
+3dB
0H
Table 74. Mono Line Output Gain Setting
LOPS3
PMLO3/RO3
Mode
0
Power-down
0
1
Normal Operation
0
Power-save
1
1
Power-save
Table 75. Mono Line Output Mode Setting
<Full-differential Mono Line Output Control Sequence (in case of using Pop Noise Reduction
Circuit)>
(2)
(default)
0dB
LOUT3 pin
Pull-down to VSS1
Normal Operation
Fall down to VSS1
Rise up to VCOM
(default)
P M LO 3 bit
P M R O 3 bit
LO P S 3 bit
LO P , LO N pins
(1)
N orm al O utput
(3)
(4)
(5)
(6)
≥
300 m s
≥
300 m s
Figure 79. Mono Line Output 3 Control Sequence (in case of using Pop Noise Reduction Circuit)
(1)
Set LOPS3 bit = “1”. Mono line output enters the power-save mode.
(2)
Set PMLO3 = PMRO3 bits = “1”. Mono line output exits the power-down mode.
LOP and LON pins rise up to VCOM voltage. Rise time is 200ms (max 300ms) at C=1
μ
F and AVDD=3.3V.
(3)
Set LOPS3 bit = “0” after LOP and LON pins rise up. Mono line output exits the power-save mode.
Mono line output is enabled.
(4)
Set LOPS3 bit = “1”. Mono line output enters power-save mode.
(5)
Set PMLO3 = PMRO3 bits = “0”. Mono line output enters power-down mode.
LOP and LON pins fall down to VSS1. Fall time is 200ms (max 300ms) at C=1
μ
F and AVDD=3.3V.
(6)
Set LOPS3 bit = “0” after LOP and LON pins fall down. Mono line output exits the power-save mode.
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相關(guān)代理商/技術(shù)參數(shù)
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AK4673 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4673EG 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4675 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP/SPK-AMP
AK4675EG 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP/SPK-AMP
AK4682 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with 2Vrms Stereo Selector
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