參數(shù)資料
型號： AK4671EG
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/RCV/HP-AMP
中文描述： 立體聲編解碼器麥克風(fēng)/垃圾車/惠普腺苷
文件頁數(shù)： 154/164頁
文件大?。?/td> 1792K
代理商： AK4671EG
[AK4671]
MS0666-E-00
2007/10
- 154 -
■
Stereo Line Output
FS3-0 bits
(Addr:01H, D7-4)
OVL/R7-0 bits
(Addr:1AH&1BH, D7-0)
PMDAL/R bits
(Addr:00H, D7-6)
PML/RO3 bits
(Addr:11H, D1-0)
1111
0000
18H
28H
LOUT3 pin
ROUT3 pin
(1)
(3)
(4)
(2)
DACSL/R bits
(Addr:0DH&0EH, D0)
(9)
Normal Output
(6)
LOPS3 bit
(Addr:11H, D2)
(5)
>300 ms
(7)
(8)
>300 ms
(10)
PFMXL/R1-0 bits
(Addr:15H, D3-0)
0000
0101
L3VL1-0 bits
(Addr:11H, D7-D6)
10
01
PFSEL bis
(Addr:1DH, D0)
Example:
PLL, Master Mode
Audio I/F Format: MSB justified (ADC & DAC)
Sampling Frequency: 44.1kHz
OVOLC bit = “1”(default)
Digital Volume Level:
8dB
LINEOUT Volume Level:
3dB
(1) Addr:01H, Data:F4H
(2) Addr:11H, Data:40H
Addr:1DH, Data:01H
Addr:15H, Data:05H
Addr:0DH&0EH, Data:01H
(3) Addr:1AH&1BH, Data:28H
(4) Addr:11H, Data:44H
(5) Addr:00H, Data:C1H
Addr:11H, Data:47H
(6) Addr:11H, Data:43H
Playback
(7) Addr:11H, Data:47H
(8) Addr:00H, Data:01H
Addr:11H, Data:44H
(9) Addr:0DH&0E, Data:00H
(10) Addr:11H, Data:40H
Figure 116. Stereo Lineout Sequence
(Speaker Playback: SDTI
→
Audio I/F
→
SVOLA
→
DATT
→
DACL/R
→
LOUT3/ROUT3
→
External SPK-Amp)
<Example>
At first, clocks should be supplied according to “
Clock Set Up
” sequence.
(1)
Set up the sampling frequency (FS3-0 bits). When the AK4671 is PLL mode, DAC and Stereo Line-Amp
should be powered-up in consideration of PLL lock time after the sampling frequency is changed.
(2)
Set up the path of “SDTI
DAC
Stereo Line-Amp”: PFSEL = “0”
“1”, PFMXL1-0 = PFMXR1-0 bits =
“0000”
“0101”, DACSL = DACSR bits = “0”
“1”
Set up analog volume for Stereo Line-Amp (Addr: 11H, L3VL1-0 bits)
(3)
Set up the output digital volume (Addr: 1AH and 1BH)
When OVOLC bit is “1” (default), OVL7-0 bits set the volume of both channels. After DAC is powered-up,
the digital volume changes from default value (0dB) to the register setting value by the soft transition.
(4)
Enter power-save mode of Stereo Line-Amp: LOPS3 bit = “0”
“1”
(5)
Power-up DAC and Stereo Line-Amp: PMDAL = PMDAR = PMLO3 = PMRO3 bits = “0”
→
“1”
LOUT3 and ROUT3 pins rise up to VCOM voltage after PMLO3 and PMRO3 bits are changed to “1”. Rise
time is 300ms(max.) at C=1
μ
F and AVDD=3.3V.
(6)
Exit power-save mode of Stereo Line-Amp: LOPS3 bit = “1”
“0”
LOPS3 bit should be set to “0” after LOUT3 and ROUT3 pins rise up. Stereo Line-Amp goes to normal
operation by setting LOPS3 bit to “0”.
(7)
Enter power-save mode of Stereo Line-Amp: LOPS3 bit: “0”
“1”
(8)
Power-down DAC and Stereo Line-Amp: PMDAL = PMDAR = PMLO3 = PMRO3 bits = “1”
→
“0”
LOUT3 and ROUT3 pins fall down to VSS1. Fall time is 300ms(max.) at C=1
μ
F and AVDD=3.3V.
(9)
Disable the path of “DAC
Stereo Line-Amp”: DACSL = DACSR bits = “1”
“0”
(10)
Exit power-save mode of Stereo Line-Amp: LOPS3 bit = “1”
“0”
LOPS3 bit should be set to “0” after LOUT3 and ROUT3 pins fall down.
相關(guān)PDF資料
PDF描述
AK4673 Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4673EG Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4682 Multi-channel CODEC with 2Vrms Stereo Selector
AK4682EQ Multi-channel CODEC with 2Vrms Stereo Selector
AK4683_07 Asynchronous Multi-Channel Audio CODEC with DIR/T
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4673 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4673EG 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
AK4675 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP/SPK-AMP
AK4675EG 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP/SPK-AMP
AK4682 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with 2Vrms Stereo Selector
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