參數(shù)資料
型號(hào)： AK4648EC
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/HP/SPK-AMP
中文描述： 立體聲編解碼器麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù)： 50/119頁
文件大小： 1272K
代理商： AK4648EC
[AK4648]
MS0625-E-01
2007/06
- 50 -
■
ALC Operation
The ALC (Automatic Level Control) is operated by ALC block when ALC bit is “1”. When only DAC is powered-up,
ALC circuit operates at playback path. When only ADC is powered-up or both ADC and DAC are powered-up, ALC
circuit operates at recording path.
PMADL bit, PMADR bit
PMDAC bit
LOOP bit
0
x
00
1
x
0
x
0
01, 10 or 11
1
1
Recording Monitor Playback
Table 26. ALC Setting (x: Don’t care)
1.
ALC Limiter Operation
During the ALC limiter operation, when either Lch or Rch exceeds the ALC limiter detection level (Table 27), the IVL
and IVR values (same value) are attenuated automatically to the amount defined by the ALC limiter ATT step (Table 28).
The IVL and IVR are then set to the same value for both channels.
When ZELMN bit = “0” (zero cross detection is enabled), the IVL and IVR values are changed by ALC limiter operation
at the individual zero crossing points of Lch and Rch or at the zero crossing timeout. ZTM1-0 bits set the zero crossing
timeout period of both ALC limiter and recovery operation (Table 29).
When ZELMN bit = “1” (zero cross detection is disabled), IVL and IVR values are immediately (period: 1/fs) changed by
ALC limiter operation. Attenuation step is fixed to 1 step regardless as the setting of LMAT1-0 bits.
The attenuate operation is done continuously until the input signal level becomes ALC limiter detection level (Table 27)
or less. After completing the attenuate operation, unless ALC bit is changed to “0”, the operation repeats when the input
signal level exceeds LMTH1-0 bits.
LMTH1
LMTH0 ALC Limier Detection Level
ALC Recovery Waiting Counter Reset Level
0
0
ALC Output
≥
2.5dBFS
0
1
ALC Output
≥
4.1dBFS
1
0
ALC Output
≥
6.0dBFS
1
1
ALC Output
≥
8.5dBFS
Table 27. ALC Limiter Detection Level / Recovery Counter Reset Level
ZELMN
LMAT1
LMAT0
0
0
0
1
1
0
1
1
1
x
x
Table 28. ALC Limiter ATT Step (x: Don’t care)
Zero Crossing Timeout Period
ZTM1
ZTM0
8kHz
0
0
128/fs
16ms
0
1
256/fs
32ms
1
0
512/fs
64ms
1
1
1024/fs
128ms
Table 29. ALC Zero Crossing Timeout Period
Status
Power-down
Playback
Recording
Recording & Playback
ALC
Power-down
Playback path
Recording path
Recording path
Recording path
(default)
(default)
2.5dBFS > ALC Output
≥
4.1dBFS
4.1dBFS > ALC Output
≥
6.0dBFS
6.0dBFS > ALC Output
≥
8.5dBFS
8.5dBFS > ALC Output
≥
12dBFS
ALC Limiter ATT Step
1 step
2 step
4 step
8 step
1step
(default)
0.375dB
0.750dB
1.500dB
3.000dB
0.375dB
0
(default)
16kHz
8ms
16ms
32ms
64ms
44.1kHz
2.9ms
5.8ms
11.6ms
23.2ms
相關(guān)PDF資料
PDF描述
AK4650 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
AK4650VG 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
AK4651 16Bit ツヒ CODEC with MIC/HP/SPK-AMP
AK4651VG 16Bit ツヒ CODEC with MIC/HP/SPK-AMP
AK4665A 20-Bit Stereo CODEC with MIC/HP-AMP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4649 制造商:AKM 制造商全稱:AKM 功能描述:24bit Stereo CODEC with MIC/SPK-AMP
AK4649ECB 制造商:AKM 制造商全稱:AKM 功能描述:24bit Stereo CODEC with MIC/SPK-AMP
AK4649VN 功能描述:IC CODEC AUDIO 32QFN 制造商:akm semiconductor inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):初步 類型:音頻 數(shù)據(jù)接口:I2C 分辨率（位）:24 b ADC/DAC 數(shù):1 / 1 三角積分:- 信噪比，ADC/DAC（db）（典型值）:- 動(dòng)態(tài)范圍，ADC/DAC（db）（典型值）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-WFQFN 裸露焊盤 供應(yīng)商器件封裝:32-QFN（5x5） 標(biāo)準(zhǔn)包裝:1,000
AK4650 制造商:AKM 制造商全稱:AKM 功能描述:16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
AK4650VG 制造商:AKM 制造商全稱:AKM 功能描述:16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*