參數(shù)資料
型號: AK4648EC
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: Stereo CODEC with MIC/HP/SPK-AMP
中文描述: 立體聲編解碼器麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 35/119頁
文件大?。?/td> 1272K
代理商: AK4648EC
[AK4648]
MS0625-E-01
2007/06
- 35 -
PLL Slave Mode (AIN3 bit = “0”, PMPLL bit = “1”, M/S bit = “0”)
A reference clock of PLL is selected among the input clocks to MCKI, BICK or LRCK pin. The required clock to the
AK4648 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits (Table 5).
a) PLL reference clock: MCKI pin
BICK and LRCK inputs should be synchronized with MCKO output. The phase between MCKO and LRCK dose not
matter. MCKO pin outputs the frequency selected by PS1-0 bits (Table 10) and the output is enabled by MCKO bit.
Sampling frequency can be selected by FS3-0 bits (Table 6).
AK4648
DSP or
μ
P
MCKO
BICK
LRCK
SDTO
SDTI
BCLK
LRCK
SDTI
SDTO
MCKI
1fs
32fs
MCLK
256fs/128fs/64fs/32fs
11.2896MHz, 12MHz, 12.288MHz, 13MHz,
13.5MHz, 19.2MHz, 24MHz, 26MHz,
27MHz
Figure 19. PLL Slave Mode 1 (PLL Reference Clock: MCKI pin)
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