- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10754 > AFE7222IRGC25 (Texas Instruments)IC AFE 12BIT 65/130MSPS 64VQFN PDF資料下載
參數(shù)資料
| 型號： | AFE7222IRGC25 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 89/106頁 |
| 文件大小： | 0K |
| 描述： | IC AFE 12BIT 65/130MSPS 64VQFN |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 通道數(shù)： | 4 |
| 功率（瓦特）： | 610mW |
| 電壓 - 電源，模擬： | 2.85 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 1.7 V ~ 1.9 V |
| 封裝/外殼： | 64-VFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 64-VQFN 裸露焊盤（9x9） |
| 包裝： | 標準包裝 |
| 其它名稱： | 296-30067-6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁當前第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
DAC_DCLKIN
DACDATA <11:0>
A
B
A
B
A
B
DAC_DCLKIN
DACDATA <11:0>
A
B
A
th
tsu
th
tsu
tCLK
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
10.3 PARALLEL CMOS DAC TX DATA
The 12-bit DAC-A and DAC-B data is interleaved (A then B) into one 12-bit word on pins
DACDATA0:DACDATA11 at twice the rate of each pattern with a DDR clock (data transitions on rising
and falling edges). This can be quadrature data or two independent transmit channels.
Figure 10-3. TX CMOS Interleaved Input
10.4 TIMING INFORMATION FOR PARALLEL CMOS DAC TX DATA
tCLK = Time period of DAC input data clock (same as time period of DAC output clock when interpolation is set to 1).
Figure 10-4. TX CMOS Input Timing
10.5 LOW POWER RX CMOS MODE
The default RX CMOS mode uses an internal PLL to position the clock edges in the middle of the data
window. While operating at speeds lower than 40 MSPS, a low power CMOS mode can be enabled (set
bit MODE_LP_CMOS to 1). In this mode, the PLL is bypassed and the clock edges are set relative to the
data transitions through delay elements. Bypassing the PLL saves about 20 mW of power. However,
because the delay elements operate in open loop, there is no tight control on the precise delay and there
can be a chip to chip variation. At low speeds, there will be sufficient set up and hold time inspite of the
variations in the clock edge relative to the data. An advantage of the low power RX CMOS mode is that
the recovery of the RX from powerdown is much faster because of the absence of the PLL. For example,
with the low power RX CMOS mode enabled, the RX recovers from a state of OFF clock to a state of ON
clock in 5 us (as compared to 20 us when in default RX CMOS mode). Another advantage of this low
power RX CMOS mode is that the minimum frequency of operation is extended down to 2.5 MSPS (from
10 MSPS).
10.6 SERIAL LVDS DAC TX INTERFACE
12-bit DAC input data is serialized onto one or two LVDS pairs per DAC. DACA and DACB data inputs
can be quadrature data or two independent receive channels. Two serialization modes are available.
1-Wire mode: 1 LVDS pair for the data to each DAC. It will operate in a DDR fashion serialized to a
frequency of 6x the pattern word rate. A frame clock (DAC_FCLKINP/N) at the word rate and a bit
clock (DAC_DCLKINP/N) at 6x. Example: 50MSPS 12-bit pattern will serialize to 300MHz on each
LVDS pair, frame clock of 50MHz and bit clock of 300MHz. Effective serial data rate is 600Mbps due to
bit transitions on rising and falling edge of bit clock. Recommended maximum word rate is ~65MSPS in
this mode.
Copyright 2011–2012, Texas Instruments Incorporated
DIGITAL INTERFACE
83
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V48C2M50BF | CONVERTER MOD DC/DC 2V 50W |
| VE-J6D-MW-F3 | CONVERTER MOD DC/DC 85V 100W |
| V48C2M50BL3 | CONVERTER MOD DC/DC 2V 50W |
| VE-J6D-MW-F2 | CONVERTER MOD DC/DC 85V 100W |
| B37872K0474K062 | CAP CER 0.47UF 25V 10% X7R 1206 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AFE7222IRGCR | 功能描述:射頻前端 Dual 12B,65MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數(shù)據(jù)速率:54 Mbps 噪聲系數(shù): 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
| AFE7222IRGCT | 功能描述:射頻前端 Dual 12B,65MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數(shù)據(jù)速率:54 Mbps 噪聲系數(shù): 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
| AFE7225 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Analog Front End Wideband Mixed-Signal Transceiver |
| AFE7225EVM | 功能描述:射頻開發(fā)工具 AFE7225 Eval Mod RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類型:Wireless Audio 工具用于評估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| AFE7225IRGC25 | 功能描述:射頻前端 Dual 12B,125MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數(shù)據(jù)速率:54 Mbps 噪聲系數(shù): 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復。