參數(shù)資料
型號(hào): AFE7222IRGC25
廠商: Texas Instruments
文件頁數(shù): 56/106頁
文件大小: 0K
描述: IC AFE 12BIT 65/130MSPS 64VQFN
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
通道數(shù): 4
功率(瓦特): 610mW
電壓 - 電源,模擬: 2.85 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.7 V ~ 1.9 V
封裝/外殼: 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-VQFN 裸露焊盤(9x9)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 296-30067-6
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
NO_OF_SAMPLES<2:0>
NO.OF SAMPLES TO CONVERT
000
1
001
2
010
4
011
8
100
16
101
Continuous
110
Continuous
111
Continuous
NO_OF_SAMPLES_AVERAGED<1:0>: No. of samples within the same conversion cycle to be averaged.
Should be less than or equal to NO_OF_SAMPLES.
NO_OF_SAMPLES_AVERAGED<1:0>
NO. OF SAMPLES TO BE AVERAGED
00
No averaging
01
2
10
4
11
8
If averaging is set, then the Aux ADC output is updated once in every X samples where X is equal to the
no. of samples to be averaged.
CONV_START: Starts Conversion.
Register Name – CONFIG136 – Address 0x36F, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
BYPASSZ_BUF
RANGE_AUXADC
BYPASSZ_BUF: Enables the high impedance input buffer.
RANGE_AUXADC: Sets the input full scale range of the Aux ADC. Default is 0-1.5V. Setting this bit to 1
makes the input full scale range 0-DVDD18.
Register Name – CONFIG137 – Address 0x370, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
EN_AUX_ADC
MODE_INPUT<1:0>
EN_AUX_ADC: Static control bit that “wakes up” the Aux ADC.
MODE_INPUT<1:0>: selects which of the 4 inputs (2 external and 2 internal) is multiplexed into the Aux
ADC. Default is AUXADC_A.
MODE_INPUT<1:0>
AUX_ADC_INPUT
00
AUX_ADC_A
01
AUX_ADC_B
5.10 HALF DUPLEX MODE REGISTERS
Register Name – CONFIG138 – Address 0x24D, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
REG_HALF_DUPLEX_
THRU_PIN
Copyright 2011–2012, Texas Instruments Incorporated
REGISTER DESCRIPTIONS
53
Product Folder Link(s): AFE7222 AFE7225
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