參數(shù)資料
型號： ADV7393EBZ
廠商： Analog Devices, Inc.
英文描述： Low Power, Chip Scale 10-Bit SD/HD Video Encoder
中文描述： 低功耗，芯片尺寸10位標(biāo)清/高清視頻編碼器
文件頁數(shù)： 88/96頁
文件大小： 1209K
代理商： ADV7393EBZ
ADV7390/ADV7391/ADV7392/ADV7393
Table 79. 10-Bit 625i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
Rev. 0 | Page 88 of 96
Table 80. 10-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting Description
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
0x82
0xC1
0x88
0x8A
0x10
0x0C
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
Table 81. 10-Bit 625i YCrCb In, CVBS/Y-C Out
Subaddress
Setting Description
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x11
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel Data Valid. CVBS/S-Video Out.
SSAF PrPb Filter Enabled. Active Video
Edge Control Enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
0x82
0xC3
0x88
0x8A
0x10
0x0C
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
Table 82. 10-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
0x8C
0xCB
PAL F
SC
value.
0x8D
0x8A
PAL F
SC
value.
0x8E
0x09
PAL F
SC
value.
0x8F
0x2A
PAL F
SC
value.
Table 83. 10-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
0x17
0x02
0x00
0x1C
0x01
0x00
0x02
0x10
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
0x80
0x11
0x82
0xC1
0x88
0x8A
0x10
0x0C
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
Table 84. 16-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x11
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
16-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
PAL F
SC
value.
0x82
0xC1
0x88
0x8A
0x08
0x0C
0x8C
0x8D
0x8E
0x8F
0xCB
0x8A
0x09
0x2A
相關(guān)PDF資料
PDF描述
ADV7400AKSTZ-80 10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer
ADV7400AKSTZ-801 10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer
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ADV7400AKSTZ-110 10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ADV73946604 制造商:LG Corporation 功能描述:Frame Assembly
ADV73946902 制造商:LG Corporation 功能描述:Frame Assembly
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