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參數(shù)資料
| 型號： | ADV7393EBZ |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| 中文描述： | 低功耗，芯片尺寸10位標清/高清視頻編碼器 |
| 文件頁數(shù)： | 84/96頁 |
| 文件大?。?/td> | 1209K |
| 代理商： | ADV7393EBZ |
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ADV7390/ADV7391/ADV7392/ADV7393
APPENDIX 9–CONFIGURATION SCRIPTS
The scripts listed in the following pages can be used to configure the ADV739x for basic operation. Certain features are enabled by
default. If required for a specific application, further features can be enabled. Table 58 lists the scripts available for SD modes of operation.
Similarly, Table 89 and Table 106 list the scripts available for ED and HD modes of operation, respectively.
STANDARD DEFINITION
Rev. 0 | Page 84 of 96
Table 58. SD Configuration Scripts
Input Format
Input Data Width
525i (NTSC)
8-Bit SDR
525i (NTSC)
8-Bit SDR
Synchronization Format
EAV/SAV
EAV/SAV
Input Color Space
YCrCb
YCrCb
Output Color Space
YPrPb
CVBS/Y-C (S-Video)
Table Number
Table 59
Table 60
Table 61
Table 62
Table 63
Table 64
Table 65
Table 66
Table 67
Table 68
Table 69
Table 70
Table 71
Table 72
Table 73
Table 74
Table 75
Table 76
Table 77
Table 78
Table 79
Table 80
Table 81
Table 82
Table 83
Table 84
Table 85
Table 86
Table 87
Table 88
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
525i (NTSC)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
625i (PAL)
8-Bit SDR
8-Bit SDR
8-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
8-Bit SDR
8-Bit SDR
8-Bit SDR
8-Bit SDR
8-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
10-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
16-Bit SDR
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
EAV/SAV
EAV/SAV
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
HSYNC/VSYNC
EAV/SAV
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
HSYNC/VSYNC
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
RGB
RGB
RGB
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
YCrCb
RGB
RGB
RGB
YPrPb
RGB
RGB
YPrPb
YPrPb
CVBS/ Y-C (S-Video)
RGB
RGB
YPrPb
RGB
YPrPb
CVBS/ Y-C (S-Video)
RGB
YPrPb
CVBS/Y-C (S-Video)
YPrPb
RGB
RGB
YPrPb
YPrPb
CVBS/Y-C (S-Video)
RGB
RGB
YPrPb
RGB
YPrPb
CVBS/Y-C (S-Video)
RGB
Table 59. 8-Bit 525i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Table 60. 8-Bit 525i YCrCb In (EAV/SAV), CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xCB
Pixel data valid. CVBS/S-Video out.
SSAF PrPb filter enabled. Active video
edge control enabled. Pedestal enabled.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7393WBCPZ | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays |
| ADV7393WBCPZ-REEL | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel |
| ADV73946603 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73946604 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73946902 | 制造商:LG Corporation 功能描述:Frame Assembly |
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