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ADV7188
User Sub Map
Address Register
Rev. 0 | Page 98 of 112
Bit
Bit Description
VBI_DATA_P18_N16[3:0]
7 6 5 4 3 2 1 0 Comments
0 0 0 0
Notes
effective
Sets VBI standard to be decoded
from line 18 (PAL), 16 (NTSC)
Sets VBI standard to be decoded
from line 332 (PAL), 280 (NTSC)
Sets VBI standard to be decoded
from line 19 (PAL), 17 (NTSC)
Sets VBI standard to be decoded
from line 333 (PAL), 281 (NTSC)
Sets VBI standard to be decoded
from line 20 (PAL), 18 (NTSC)
Sets VBI standard to be decoded
from line 334 (PAL), 282 (NTSC)
Sets VBI standard to be decoded
from line 21 (PAL), 19 (NTSC)
Sets VBI standard to be decoded
from line 335 (PAL), 283 (NTSC)
Sets VBI standard to be decoded
from line 22 (PAL), 20 (NTSC)
Sets VBI standard to be decoded
from line 336 (PAL), 284 (NTSC)
Sets VBI standard to be decoded
from line 23 (PAL), 21 (NTSC)
Sets VBI standard to be decoded
from line 337 (PAL), 285 (NTSC)
Sets VBI standard to be decoded
from line 24 (PAL), 22 (NTSC)
Closed captioning not detected
Closed captioning detected
Closed captioning decoded from
odd field
Closed captioning decoded from
even field
CGMS/WSS not detected
CGMS/WSS detected
VPS not detected
VPS detected
VBI_DATA_P332_N280[3:0]
0 0 0 0
0x72
VDP_LINE_01C
VBI_DATA_P19_N17[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
VBI_DATA_P333_N281[3:0]
0 0 0 0
0x73
VDP_LINE_01D
VBI_DATA_P20_N18[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
VBI_DATA_P334_N282[3:0]
0 0 0 0
0x74
VDP_LINE_01E
VBI_DATA_P21_N19[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
VBI_DATA_P335_N283[3:0]
0 0 0 0
0x75
VDP_LINE_01F
VBI_DATA_P22_N20[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
VBI_DATA_P336_N284[3:0]
0 0 0 0
0x76
VDP_LINE_020
VBI_DATA_P23_N21[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
VBI_DATA_P337_N285[3:0]
0 0 0 0
0x77
VDP_LINE_021
VBI_DATA_P24_N22[3:0]
0 0 0 0
MAN_LINE_PGM must be set
to 1 for these bits to be
effective
0
0
1
CC_AVL
CC_CLEAR resets the CC_AVL
bit
CC_EVEN_FIELD
1
0
1
0
0
1
CGMS_WSS_AVL
CGMS_WSS_CLEAR resets the
CGMS_WSS_AVL bit
Reserved
GS_PDC_VPS_UTC_AVL
GS_PDC_VPS_UTC_CLEAR
resets the
GS_PDC_VPS_UTC_AVL bit
0
1
0
1
0
1
0
Gemstar 1x detected
Gemstar 2x detected
VITC not detected
VITC detected
Teletext not detected
Teletext detected
Do not re-initialize the CCAP
registers
Re-initializes the CCAP readback
registers
Do not re-initialize the CGMS/WSS
registers
Re-initializes the CGMS/WSS
readback registers
Do not re-initialize the GS/PDC/VPS/
UTC registers
Refreshes the GS/PDC/VPS/UTC
readback registers
Do not re-initialize the VITC registers
Re-initializes the VITC readback
registers
x Decoded Byte 1 of CCAP
GS_DATA_TYPE
VITC_AVL
VITC_CLEAR resets the
VITC_AVL bit
0x78
VDP_STATUS (Read Only)
TTXT_AVL
CC_CLEAR
1
This is a self-clearing bit
Reserved
CGMS_WSS_CLEAR
0
0
This is a self-clearing bit
1
Reserved
GS_PDC_VPS_UTC_CLEAR
0
0
This is a self-clearing bit
1
Reserved
VITC_CLEAR
0
1
0
This is a self-clearing bit
0x78
VDP_STATUS_CLEAR
(Write Only)
Reserved
CCAP_BYTE_1[7:0]
0
x
x
x
x
x
x
0x79
VDP_CCAP_DATA_0 (Read
Only)
VDP_CCAP_DATA_1 (Read
Only)
x
0x7A
CCAP_BYTE_2[7:0]
x
x
x
x
x
x
x
x Decoded Byte 2 of CCAP