參數(shù)資料
型號： ADV7188
廠商： Analog Devices, Inc.
英文描述： Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述： 標清多格式視頻解碼器支持快速開關重疊
文件頁數(shù)： 11/112頁
文件大小： 943K
代理商： ADV7188
ADV7188
Pin No.
66
Rev. 0 | Page 11 of 112
Mnemonic
ALSB
Type
I
Function
This pin selects the I
2
C address for the ADV7188. ALSB set to Logic 0 sets the address for a
write as 0x40; set to Logic 1 sets the address to 0x42.
System Reset Input, Active Low. A minimum low reset pulse width of 5 ms is required to
reset the ADV7188 circuitry.
Line-Locked Clock 1. This is a line-locked output clock for the pixel data output by the
ADV7188. Nominally 27 MHz, but varies up or down according to video line length.
Line-Locked Clock 2. This is a divide-by-2 version of the LLC1 output clock for the pixel
data output by the ADV7188. Nominally 13.5 MHz, but varies up or down according to
video line length.
This is the input pin for the 28.63636 MHz crystal, or can be overdriven by an external 3.3
V, 28.63636 MHz clock oscillator source. In crystal mode, the crystal must be a
fundamental crystal.
This pin should be connected to the 28.63636 MHz crystal or left as a no connect if an
external 3.3 V, 28.63636 MHz clock oscillator source is used to clock the ADV7188. In
crystal mode, the crystal must be a fundamental crystal.
Logic 0 on this pin places the ADV7188 in a power-down mode. Refer to the I
2
C Register
Maps section for more options on power-down modes for the ADV7188.
When set to Logic 0, OE enables the pixel output bus, P19 to P0 of the ADV7188. Logic 1
on the OE pin places P19 to P0, HS, VS, and SFL/SYNC_OUT into a high impedance state.
The recommended external loop filter must be connected to this ELPF pin, as shown in
Figure 50.
Subcarrier Frequency Lock. This pin contains a serial output stream that can be used to
lock the subcarrier frequency when this decoder is connected to any Analog Devices, Inc.
digital video encoder.
Internal Voltage Reference Output. Refer to Figure 50 for a recommended capacitor
network for this pin.
The CML pin is a common-mode level for the internal ADC’s. Refer to Figure 50 for a
recommended capacitor network for this pin.
ADC’s Capacitor Network. Refer to Figure 50 for a recommended capacitor network for
this pin.
ADC’s Capacitor Network. Refer to Figure 50 for a recommended capacitor network for
this pin.
64
RESET
I
27
LLC1
O
26
LLC2
O
29
XTAL
I
28
XTAL1
O
36
PWRDN
I
79
OE
I
37
ELPF
I
12
SFL
O
51
REFOUT
O
52
CML
O
48, 49
CAPY1, CAPY2
I
54. 55
CAPC1, CAPC2
I
相關PDF資料
PDF描述
ADV7189B Multiformat SDTV Video Decoder
ADV7189BBSTZ268H Multiformat SDTV Video Decoder
ADV7189BKSTZ10F Multiformat SDTV Video Decoder
ADV7189 Multiformat SDTV Video Decoder
ADV7189KST Multiformat SDTV Video Decoder
相關代理商/技術參數(shù)
參數(shù)描述
ADV7188BSTZ 功能描述:IC DECODER VID MULTIFORM 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7189 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
ADV7189B 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
ADV7189BBSTZ 功能描述:IC VIDEO DECODER SDTV 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7189BBSTZ268H 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
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