參數(shù)資料
型號： ADV7188
廠商： Analog Devices, Inc.
英文描述： Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述： 標(biāo)清多格式視頻解碼器支持快速開關(guān)重疊
文件頁數(shù)： 27/112頁
文件大?。?/td> 943K
代理商： ADV7188
ADV7188
DEF_VAL_EN Default Value Enable, Address 0x0C [0]
This bit forces the use of the default values for Y, Cr, and Cb.
Refer to the descriptions for DEF_Y and DEF_C for additional
information. In this mode, the decoder also outputs a stable
27 MHz clock, HS, and VS.
Rev. 0 | Page 27 of 112
0 (default)—Outputs a colored screen determined by user-
programmable Y, Cr, and Cb values when the decoder free-
runs. Free-run mode is turned on and off by the
DEF_VAL_AUTO_EN bit.
1—Forces a colored screen output determined by user-
programmable Y, Cr, and Cb values. This overrides picture
data even if the decoder is locked.
DEF_VAL_AUTO_EN Default Value Automatic Enable,
Address 0x0C [1]
This bit enables the automatic use of the default values for Y, Cr,
and Cb when the ADV7188 cannot lock to the video signal.
0—Disables free-run mode. If the decoder is unlocked, it
outputs noise.
1 (default)—Enables free-run mode. A colored screen set by the
user-programmable Y, Cr, and Cb values is displayed when the
decoder loses lock.
CLAMP OPERATION
The input video is ac-coupled into the ADV7188 through a
0.1 μF capacitor. It is recommended that the range of the input
video signal is 0.5 V to 1.6 V (typically 1 V
p-p). If the signal
exceeds this range, it cannot be processed correctly in the
decoder. Since the input signal is ac-coupled into the decoder,
its dc value needs to be restored. This process is referred to as
clamping the video. This section explains the general process of
clamping on the ADV7188 and shows the different ways in
which a user can configure its behavior.
The ADV7188 uses a combination of current sources and a
digital processing block for clamping, as shown in Figure 14.
The analog processing channel shown is replicated three times
inside the IC. While only one single-channel (and only one
ADC) is needed for a CVBS signal, two independent channels
are needed for YC (S-VHS) type signals, and three independent
channels are needed to allow component signals (YPrPb) to be
processed.
The clamping can be divided into two sections
Clamping before the ADC (analog domain): current
sources.
Clamping after the ADC (digital domain): digital
processing block.
The ADCs can digitize an input signal only if it resides within
their 1.6 V input voltage range. An input signal with a dc level
that is too large or too small is clipped at the top or bottom of
the ADC range.
The primary task of the analog clamping circuits is to ensure
that the video signal stays within the valid ADC input window
so that the analog-to-digital conversion can take place. It is not
necessary to clamp the input signal with a very high accuracy in
the analog domain as long as the video signal fits the ADC range.
After digitization, the digital fine clamp block corrects for any
remaining variations in dc level. Since the dc level of an input
video signal refers directly to the brightness of the picture
transmitted, it is important to perform a fine clamp with high
accuracy; otherwise, brightness variations may occur. Further-
more, dynamic changes in the dc level almost certainly lead to
visually objectionable artifacts, and must therefore be prohibited.
The clamping scheme must be able to acquire a newly
connected video signal with a completely unknown dc level,
and it must maintain the dc level during normal operation.
To quickly acquire an unknown video signal, the large current
clamps may be activated. It is assumed that the amplitude of the
video signal at this point is of a nominal value. Control of the
coarse and fine current clamp parameters is automatically
performed by the decoder.
Standard definition video signals may have excessive noise on
them. In particular, CVBS signals transmitted by terrestrial
broadcast and demodulated using a tuner usually show very
large levels of noise (>100 mV). A voltage clamp would be
unsuitable for this type of video signal. Instead, the ADV7188
uses a set of four current sources that can cause coarse
(>0.5 mA) and fine (<0.1 mA) currents to flow into and away
from the high impedance node that carries the video signal (see
Figure 14).
The following sections describe the I
2
C signals that can be used to
influence the behavior of the clamping block on the ADV7188.
CCLEN Current Clamp Enable, Address 0x14 [4]
The current clamp enable bit allows the user to switch off the
current sources in the analog front end altogether. This may be
useful if the incoming analog video signal is clamped externally.
0—The current sources are switched off.
1 (default)—The current sources are enabled.
相關(guān)PDF資料
PDF描述
ADV7189B Multiformat SDTV Video Decoder
ADV7189BBSTZ268H Multiformat SDTV Video Decoder
ADV7189BKSTZ10F Multiformat SDTV Video Decoder
ADV7189 Multiformat SDTV Video Decoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7188BSTZ 功能描述:IC DECODER VID MULTIFORM 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7189 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
ADV7189B 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
ADV7189BBSTZ 功能描述:IC VIDEO DECODER SDTV 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7189BBSTZ268H 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
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