參數(shù)資料
型號: ADV7188
廠商: Analog Devices, Inc.
英文描述: Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述: 標清多格式視頻解碼器支持快速開關(guān)重疊
文件頁數(shù): 33/112頁
文件大?。?/td> 943K
代理商: ADV7188
ADV7188
Luma Gain
LAGC[2:0] Luma Automatic Gain Control, Address 0x2C [6:4]
The luma automatic gain control mode bits select the mode of
operation for the gain control in the luma path.
Rev. 0 | Page 33 of 112
There are ADI internal parameters to customize the peak white
gain control. Contact ADI for more information.
Table 40. LAGC Function
LAGC[2:0]
Description
000
Manual fixed gain (use LMG[11:0])
001
AGC (blank level to sync tip); peak white algorithm
OFF
010
(default)
ON
011
Reserved
100
Reserved
101
Reserved
110
Reserved
111
Freeze gain
LAGT[1:0] Luma Automatic Gain Timing, Address 0x2F [7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. Note that this register only has an effect if the
LAGC[2:0] register is set to 001, 010, 011, or 100 (automatic
gain control modes).
AGC (blank level to sync tip); peak white algorithm
If peak white AGC is enabled and active (see the STATUS_1[7:0]
Address 0x10 [7:0] section), the actual gain update speed is
dictated by the peak white AGC loop and, as a result, the LAGT
settings have no effect. As soon as the part leaves peak white
AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be
customized by the use of internal parameters. Contact ADI for
more information.
Table 41. LAGT Function
LAGT[1:0]
Description
00
Slow (TC = 2 sec)
01
Medium (TC = 1 sec)
10
Fast (TC = 0.2 sec)
11 (default)
Adaptive
LG[11:0] Luma Gain, Address 0x2F [3:0]; Address 0x30 [7:0];
LMG[11:0] Luma Manual Gain, Address 0x2F [3:0];
Address 0x30 [7:0]
Luma gain [11:0] is a dual-function register. If written to, a
desired manual luma gain can be programmed. This gain
becomes active if the LAGC[2:0] mode is switched to manual
fixed gain. Equation 2 and Equation 3 show how to calculate a
desired gain for NTSC and PAL standards, respectively.
NTSC Luma_Gain
=
1024
<
LMG
63
.
9078
.
1128
4095
]
:
11
[
K
=
(2)
PAL Luma_Gain
=
1024
<
LMG
351
.
838
.
1222
4095
]
:
11
[
K
=
(3)
If read back, this register returns the current gain
value.
Depending on the setting in the LAGC[2:0] bits, this is one of
the following values:
Luma manual gain value (LAGC[2:0] set to luma manual
gain mode)
Luma automatic gain value (LAGC[2:0] set to any of the
automatic modes)
Table 42. LG/LMG Function
LG[11:0]/LMG[11:0]
Read/Write
LMG[11:0] = X
Write
Description
Manual gain for luma
path
Actually used gain
LG[11:0]
For example, to program the ADV7188 into manual fixed gain
mode with a desired gain of 0.89 for the NTSC standard:
1.
Use Equation 2 to convert the gain:
0.95 × 1128 = 1071.6
2.
Truncate to integer value:
1071.6 = 1071
3.
Convert to hexadecimal:
1071d = 0x42F
4.
Split into two registers and program:
Luma Gain Control 1 [3:0] = 0x4
Luma Gain Control 2 [7:0] = 0x2F
5.
Enable manual fixed gain mode:
Set LAGC[2:0] to 000
Read
BETACAM Enable Betacam Levels, Address 0x01 [5]
If YPrPb data is routed through the ADV7188, the automatic
gain control modes can target different video input levels, as
outlined in Table 45. Note that the BETACAM bit is valid only if
the input mode is YPrPb (component). The BETACAM bit sets
the target value for AGC operation. A review of the following
sections is useful.
INSEL[3:0] Input Selection, Address 0x00 [3:0] to find how
component video (YPrPb) can be routed through the
ADV7188.
Video Standard Selection to select the various standards,
for example, with and without pedestal.
The automatic gain control (AGC) algorithms adjust the levels
based on the setting of the BETACAM bit.
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