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ADV7184
Address
Rev. 0 | Page 87 of 108
Register
Bit Description
Bit
Notes
7 6 5 4 3 2
1 1
0 0
0 1
1 0
1 1
1 0 Comments
VBI ends 2 lines later (line 285)
VBI ends 1 line earlier (line 20)
ITU-R BT.470 compliant (Line 21)
VBI ends 1 line later (line 22)
VBI ends 2 lines later (line 23)
0
0 Color output beginning line 335
0
1 ITU-R BT.470 compliant color output
beginning Line 336
1
0 Color output beginning line 337
1
1 Color output beginning line 338
Color output beginning line 22
ITU-R BT.470 compliant color output
beginning Line 23
Color output beginning line 24
Color output beginning line 25
Color output beginning line 282
ITU-R BT.470 compliant color output
beginning Line 283
VBI ends 1 line later (line 284)
Color output beginning line 285
Color output beginning line 20
ITU-R BT.470 compliant color output
beginning Line 21
Color output beginning line 22
Color output beginning line 23
x
x
FB_RISE, 1 = There has been a rising
edge on FB pin since last I
2
C read
PVBIOLCM[1:0]. NTSC VBI odd field line
control.
Controls position of first active
(comb filtered) line after VBI
on odd field in NTSC
0 0
0 1
PVBIECCM[1:0]. PAL VBI even field color
control.
Controls the position of first
line that outputs color after
VBI on even field in PAL
0 0
0 1
1 0
1 1
PVBIOCCM[1:0]. PAL VBI odd field color
control.
Controls the position of first
line that outputs color after
VBI on odd field in PAL
0 0
0 1
1 0
1 1
NVBIECCM[1:0]. NTSC VBI even field color
control.
Controls the position of first
line that outputs color after
VBI on even field in NTSC
1 0
1 1
x
x x
0xEC
V Blank Control 2
NVBIOCCM[1:0]. NTSC VBI odd field color
control.
Controls the position of first
line that outputs color after
VBI on odd field in NTSC
0xED
FB_STATUS (Read Only)
Reserved.
FB_STATUS[3:0]. Provides information
about the status of the FB pin.
FB_STATUS.0
FB_STATUS.1
Self-clearing bit
x
FB_FALL, 1 = there has been a
falling edge on FB pin since last I
2
C
read
FB_STAT, Instantaneous value of FB
signal at time of I
2
C read
FB_HIGH, Indicates that the FB
signal has gone high since the last
I
2
C read
0 Static switch mode – full RGB or full
CVBS data
1 Fixed alpha blending, See
MAN_ALPHA_VAL[6:0]
0 Dynamic switching (fast mux)
1 Dynamic switching with edge
enhancement
CVBS source
RGB source
FB pin active high
FB pin active low
0
Self-clearing bit
FB_STATUS.2
x
FB_STATUS.3
x
Self-clearing bit
0
0
1
1
0 0 0 1
0 0 0 0 0
0
1
0
1
0
Selects either CVBS or RGB to
be O/P
0xED
FB_CONTROL 1
(Write Only)
FB_MODE[1:0]. Selects FB mode.
MAN_ALPHA_VAL[6:0]. Determines in what
proportion the video from the CVBS source
and the RGB source are blended.
FB_CSC_MAN
0
Automatic configuration of the CSC
for SCART support
Enable manual programming of
CSC
0
1
0
1
0
Contrast reduction mode disabled –
FB signal interpreted as Bi-level
signal
0xEE
FB_CONTROL 2
1
CSC is used to convert RGB
portion of SCART signal to
YCrCb
0
0
0
0
0
1
0
0
1
1
0
FB_EDGE_SHAPE[2:0]
Improves picture transition for
high speed fast blank
switching
0xEF
FB_CONTROL 3
CNTR_ENABLE