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參數(shù)資料
| 型號： | ADV7184BSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
| 中文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | LEAD FREE, MS-026BEC, LQFP-80 |
| 文件頁數(shù)： | 42/108頁 |
| 文件大?。?/td> | 925K |
| 代理商： | ADV7184BSTZ |
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ADV7184
NEWAVMODE New AV Mode, Address 0x31 [4]
0—EAV/SAV codes are generated to suit ADI encoders. No
adjustments are possible.
1 (default)—Enables the manual position of the VSYNC, Field,
and AV codes using Register 0x34 to Register 0x37 and Register
0xE5 to Register 0xEA. Default register settings are CCIR656-
compliant; see Figure 27 for NTSC and Figure 32 for PAL. For
recommended manual user settings, see Table 62 and Figure 28
for NTSC; see Table 63 and Figure 33 for PAL.
Table 62. Recommended User Settings for NTSC
(See Figure 28)
Register
Register Name
0x31
VSYNC Field Control 1
0x32
VSYNC Field Control 2
0x33
VSYNC Field Control 3
0x34
HSYNC Position 1
0x35
HSYNC Position 2
0x36
HSYNC Position 3
0x37
Polarity
0xE5
NTSV_V_Bit_Beg
0xE6
NTSC_V_Bit_End
0xE7
NTSC_F_Bit_Tog
Rev. 0 | Page 42 of 108
Write
0x1A
0x81
0x84
0x00
0x00
0x7D
0xA1
0x41
0x84
0x06
HVSTIM Horizontal VS Timing, Address 0x31 [3]
The HVSTIM bit allows the user to select where the VS signal is
being asserted within a line of video. Some interface circuitry
may require VS to go low while HS is low.
0 (default)—The start of the line is relative to HSE.
1—The start of the line is relative to HSB.
VSBHO VS Begin Horizontal Position Odd, Address 0x32 [7]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes active. Some follow-on
chips require the VS pin to change state only when HS is
high/low.
0 (default)—The VS pin goes high at the middle of a line of
video (odd field).
1—The VS pin changes state at the start of a line (odd field).
VSBHE VS Begin Horizontal Position Even, Address 0x32 [6]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes active. Some follow-on
chips require the VS pin to change state when only HS is
high/low.
0—The VS pin goes high at the middle of a line of video (even
field).
1 (default)—The VS pin changes state at the start of a line (even
field).
VSEHO VS End Horizontal Position Odd, Address 0x33 [7]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes inactive. Some follow-on
chips require the VS pin to change state only when HS is
high/low.
0—The VS pin goes low (inactive) at the middle of a line of
video (odd field).
1 (default)—The VS pin changes state at the start of a line (odd
field).
VSEHE VS End Horizontal Position Even, Address 0x33 [6]
This bit selects the position within a line at which the VS pin
(not the bit in the AV code) becomes inactive. Some follow-on
chips require the VS pin to change state only when HS is
high/low.
0 (default)—The VS pin goes low (inactive) at the middle of a
line of video (even field).
1—The VS pin changes state at the start of a line (even field).
PVS Polarity VS, Address 0x37 [5]
The polarity of the VS pin can be inverted using the PVS bit.
0 (default)—VS is active high.
1—VS is active low.
PF Polarity FIELD, Address 0x37 [3]
The polarity of the FIELD pin can be inverted using the PF bit.
0 (default)—FIELD is active high.
1—FIELD is active low.
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| ADV7186BBCZ | 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7186BBCZ-RL | 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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